3799c40189
Get the "usb-bus" clock and ensure it is enabled when the OHCI core is in use. It seems that a few bootloaders do not enable the UPLL at startup, which stops the OHCI core having a 48MHz bus clock. The improvements to the clock framework for the s3c24xx now allow the USB PLL to be started and stopped when being used. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| ehci-au1xxx.c | ||
| ehci-dbg.c | ||
| ehci-fsl.c | ||
| ehci-fsl.h | ||
| ehci-hcd.c | ||
| ehci-hub.c | ||
| ehci-mem.c | ||
| ehci-pci.c | ||
| ehci-q.c | ||
| ehci-sched.c | ||
| ehci.h | ||
| hc_crisv10.c | ||
| hc_crisv10.h | ||
| isp116x-hcd.c | ||
| isp116x.h | ||
| ohci-at91.c | ||
| ohci-au1xxx.c | ||
| ohci-dbg.c | ||
| ohci-hcd.c | ||
| ohci-hub.c | ||
| ohci-lh7a404.c | ||
| ohci-mem.c | ||
| ohci-omap.c | ||
| ohci-pci.c | ||
| ohci-ppc-soc.c | ||
| ohci-pxa27x.c | ||
| ohci-q.c | ||
| ohci-s3c2410.c | ||
| ohci-sa1111.c | ||
| ohci.h | ||
| pci-quirks.c | ||
| pci-quirks.h | ||
| sl811-hcd.c | ||
| sl811.h | ||
| sl811_cs.c | ||
| uhci-debug.c | ||
| uhci-hcd.c | ||
| uhci-hcd.h | ||
| uhci-hub.c | ||
| uhci-q.c | ||