302 lines
6.9 KiB
C
302 lines
6.9 KiB
C
/*
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* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
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* Based largely on io_se.c.
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*
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* I/O routine for Renesas Solutions Highlander R7780RP-1
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*
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* Initial version only to support LAN access; some
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* placeholder code from io_r7780rp.c left in with the
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* expectation of later SuperIO and PCMCIA access.
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*/
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <asm/r7780rp.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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static inline unsigned long port2adr(unsigned int port)
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{
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if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
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if (port == 0x3f6)
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return (PA_AREA5_IO + 0x80c);
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else
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return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
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else
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maybebadio((unsigned long)port);
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return port;
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}
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static inline unsigned long port88796l(unsigned int port, int flag)
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{
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unsigned long addr;
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if (flag)
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addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
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else
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addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
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return addr;
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}
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/* The 7780 R7780RP-1 seems to have everything hooked */
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/* up pretty normally (nothing on high-bytes only...) so this */
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/* shouldn't be needed */
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static inline int shifted_port(unsigned long port)
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{
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/* For IDE registers, value is not shifted */
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if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
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return 0;
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else
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return 1;
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}
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#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
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#define CHECK_AX88796L_PORT(port) \
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((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
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#else
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#define CHECK_AX88796L_PORT(port) (0)
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#endif
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/*
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* General outline: remap really low stuff [eventually] to SuperIO,
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* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
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* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
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* should be way beyond the window, and is used w/o translation for
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* compatibility.
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*/
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u8 r7780rp_inb(unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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return ctrl_inw(port88796l(port, 0)) & 0xff;
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else if (PXSEG(port))
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return ctrl_inb(port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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return ctrl_inb(pci_ioaddr(port));
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return ctrl_inw(port2adr(port)) & 0xff;
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}
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u8 r7780rp_inb_p(unsigned long port)
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{
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u8 v;
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if (CHECK_AX88796L_PORT(port))
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v = ctrl_inw(port88796l(port, 0)) & 0xff;
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else if (PXSEG(port))
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v = ctrl_inb(port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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v = ctrl_inb(pci_ioaddr(port));
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else
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v = ctrl_inw(port2adr(port)) & 0xff;
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ctrl_delay();
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return v;
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}
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u16 r7780rp_inw(unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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maybebadio(port);
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else if (PXSEG(port))
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return ctrl_inw(port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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return ctrl_inw(pci_ioaddr(port));
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else
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maybebadio(port);
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return 0;
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}
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u32 r7780rp_inl(unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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maybebadio(port);
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else if (PXSEG(port))
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return ctrl_inl(port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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return ctrl_inl(pci_ioaddr(port));
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else
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maybebadio(port);
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return 0;
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}
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void r7780rp_outb(u8 value, unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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ctrl_outw(value, port88796l(port, 0));
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else if (PXSEG(port))
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ctrl_outb(value, port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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ctrl_outb(value, pci_ioaddr(port));
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else
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ctrl_outw(value, port2adr(port));
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}
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void r7780rp_outb_p(u8 value, unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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ctrl_outw(value, port88796l(port, 0));
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else if (PXSEG(port))
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ctrl_outb(value, port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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ctrl_outb(value, pci_ioaddr(port));
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else
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ctrl_outw(value, port2adr(port));
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ctrl_delay();
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}
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void r7780rp_outw(u16 value, unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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maybebadio(port);
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else if (PXSEG(port))
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ctrl_outw(value, port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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ctrl_outw(value, pci_ioaddr(port));
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else
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maybebadio(port);
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}
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void r7780rp_outl(u32 value, unsigned long port)
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{
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if (CHECK_AX88796L_PORT(port))
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maybebadio(port);
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else if (PXSEG(port))
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ctrl_outl(value, port);
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else if (is_pci_ioaddr(port) || shifted_port(port))
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ctrl_outl(value, pci_ioaddr(port));
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else
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maybebadio(port);
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}
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void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
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{
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volatile u16 *p;
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u8 *buf = dst;
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if (CHECK_AX88796L_PORT(port)) {
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p = (volatile u16 *)port88796l(port, 0);
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while (count--)
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*buf++ = *p & 0xff;
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} else if (PXSEG(port)) {
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while (count--)
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*buf++ = *(volatile u8 *)port;
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} else if (is_pci_ioaddr(port) || shifted_port(port)) {
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volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
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while (count--)
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*buf++ = *bp;
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} else {
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p = (volatile u16 *)port2adr(port);
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while (count--)
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*buf++ = *p & 0xff;
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}
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}
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void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
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{
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volatile u16 *p;
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u16 *buf = dst;
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if (CHECK_AX88796L_PORT(port))
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p = (volatile u16 *)port88796l(port, 1);
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else if (PXSEG(port))
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p = (volatile u16 *)port;
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else if (is_pci_ioaddr(port) || shifted_port(port))
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p = (volatile u16 *)pci_ioaddr(port);
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else
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p = (volatile u16 *)port2adr(port);
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while (count--)
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*buf++ = *p;
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}
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void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
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{
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u32 *buf = dst;
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if (CHECK_AX88796L_PORT(port))
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maybebadio(port);
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else if (is_pci_ioaddr(port) || shifted_port(port)) {
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volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
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while (count--)
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*buf++ = *p;
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} else
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maybebadio(port);
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}
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void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
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{
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volatile u16 *p;
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const u8 *buf = src;
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if (CHECK_AX88796L_PORT(port)) {
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p = (volatile u16 *)port88796l(port, 0);
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while (count--)
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*p = *buf++;
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} else if (PXSEG(port))
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while (count--)
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ctrl_outb(*buf++, port);
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else if (is_pci_ioaddr(port) || shifted_port(port)) {
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volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
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while (count--)
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*bp = *buf++;
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} else {
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p = (volatile u16 *)port2adr(port);
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while (count--)
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*p = *buf++;
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}
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}
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void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
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{
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volatile u16 *p;
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const u16 *buf = src;
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if (CHECK_AX88796L_PORT(port))
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p = (volatile u16 *)port88796l(port, 1);
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else if (PXSEG(port))
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p = (volatile u16 *)port;
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else if (is_pci_ioaddr(port) || shifted_port(port))
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p = (volatile u16 *)pci_ioaddr(port);
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else
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p = (volatile u16 *)port2adr(port);
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while (count--)
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*p = *buf++;
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}
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void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
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{
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const u32 *buf = src;
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if (CHECK_AX88796L_PORT(port))
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maybebadio(port);
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else if (is_pci_ioaddr(port) || shifted_port(port)) {
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volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
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while (count--)
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*p = *buf++;
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} else
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maybebadio(port);
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}
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void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
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{
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if (CHECK_AX88796L_PORT(port))
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return (void __iomem *)port88796l(port, size > 1);
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else if (PXSEG(port))
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return (void __iomem *)port;
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else if (is_pci_ioaddr(port) || shifted_port(port))
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return (void __iomem *)pci_ioaddr(port);
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return (void __iomem *)port2adr(port);
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}
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