147 lines
4.6 KiB
C
147 lines
4.6 KiB
C
#ifndef __iop_scrc_out_defs_h
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#define __iop_scrc_out_defs_h
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/*
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* This file is autogenerated from
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* file: ../../inst/io_proc/rtl/iop_scrc_out.r
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* id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
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* last modfied: Mon Apr 11 16:08:46 2005
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_scrc_out_defs.h ../../inst/io_proc/rtl/iop_scrc_out.r
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* id: $Id: iop_scrc_out_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope iop_scrc_out */
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/* Register rw_cfg, scope iop_scrc_out, type rw */
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typedef struct {
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unsigned int trig : 2;
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unsigned int inv_crc : 1;
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unsigned int dummy1 : 29;
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} reg_iop_scrc_out_rw_cfg;
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#define REG_RD_ADDR_iop_scrc_out_rw_cfg 0
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#define REG_WR_ADDR_iop_scrc_out_rw_cfg 0
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/* Register rw_ctrl, scope iop_scrc_out, type rw */
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typedef struct {
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unsigned int strb_src : 1;
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unsigned int out_src : 1;
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unsigned int dummy1 : 30;
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} reg_iop_scrc_out_rw_ctrl;
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#define REG_RD_ADDR_iop_scrc_out_rw_ctrl 4
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#define REG_WR_ADDR_iop_scrc_out_rw_ctrl 4
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/* Register rw_init_crc, scope iop_scrc_out, type rw */
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typedef unsigned int reg_iop_scrc_out_rw_init_crc;
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#define REG_RD_ADDR_iop_scrc_out_rw_init_crc 8
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#define REG_WR_ADDR_iop_scrc_out_rw_init_crc 8
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/* Register rw_crc, scope iop_scrc_out, type rw */
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typedef unsigned int reg_iop_scrc_out_rw_crc;
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#define REG_RD_ADDR_iop_scrc_out_rw_crc 12
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#define REG_WR_ADDR_iop_scrc_out_rw_crc 12
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/* Register rw_data, scope iop_scrc_out, type rw */
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typedef struct {
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unsigned int val : 1;
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unsigned int dummy1 : 31;
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} reg_iop_scrc_out_rw_data;
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#define REG_RD_ADDR_iop_scrc_out_rw_data 16
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#define REG_WR_ADDR_iop_scrc_out_rw_data 16
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/* Register r_computed_crc, scope iop_scrc_out, type r */
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typedef unsigned int reg_iop_scrc_out_r_computed_crc;
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#define REG_RD_ADDR_iop_scrc_out_r_computed_crc 20
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/* Constants */
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enum {
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regk_iop_scrc_out_crc = 0x00000001,
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regk_iop_scrc_out_data = 0x00000000,
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regk_iop_scrc_out_dif = 0x00000001,
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regk_iop_scrc_out_hi = 0x00000000,
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regk_iop_scrc_out_neg = 0x00000002,
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regk_iop_scrc_out_no = 0x00000000,
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regk_iop_scrc_out_pos = 0x00000001,
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regk_iop_scrc_out_pos_neg = 0x00000003,
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regk_iop_scrc_out_reg = 0x00000000,
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regk_iop_scrc_out_rw_cfg_default = 0x00000000,
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regk_iop_scrc_out_rw_crc_default = 0x00000000,
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regk_iop_scrc_out_rw_ctrl_default = 0x00000000,
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regk_iop_scrc_out_rw_data_default = 0x00000000,
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regk_iop_scrc_out_rw_init_crc_default = 0x00000000,
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regk_iop_scrc_out_yes = 0x00000001
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};
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#endif /* __iop_scrc_out_defs_h */
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