9c749e177c
Unaligned code use shift for finding register operand. There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1 by ori rD, r0, (1 << imm); \ idivu rD, rD, rA but if rD is equal rA then ori instruction rewrite value which should be devide. The patch remove this macro which use idivu instruction because idivu takes 32/34 cycles. The highest shifting is 20 which takes 20 cycles. Signed-off-by: Michal Simek <monstr@monstr.eu> |
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.. | ||
cpu | ||
Makefile | ||
asm-offsets.c | ||
dma.c | ||
early_printk.c | ||
entry-nommu.S | ||
entry.S | ||
exceptions.c | ||
ftrace.c | ||
head.S | ||
heartbeat.c | ||
hw_exception_handler.S | ||
init_task.c | ||
intc.c | ||
irq.c | ||
kgdb.c | ||
mcount.S | ||
microblaze_ksyms.c | ||
misc.S | ||
module.c | ||
process.c | ||
prom.c | ||
prom_parse.c | ||
ptrace.c | ||
reset.c | ||
selfmod.c | ||
setup.c | ||
signal.c | ||
stacktrace.c | ||
sys_microblaze.c | ||
syscall_table.S | ||
timer.c | ||
traps.c | ||
unwind.c | ||
vmlinux.lds.S |