365 lines
9.4 KiB
C
365 lines
9.4 KiB
C
/*
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* File: arch/blackfin/mach-bf533/boards/cm_bf561.c
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* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
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* Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
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*
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* Created: 2006
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* Description: Board description file
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*
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* Modified:
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* Copyright 2004-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/usb/isp1362.h>
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#include <linux/pata_platform.h>
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#include <linux/irq.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/portmux.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "Bluetechnix CM BF561";
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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/* all SPI peripherals info goes here */
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#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00020000,
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.offset = 0,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "kernel",
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.size = 0xe0000,
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.offset = 0x20000
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}, {
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.name = "file system",
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.size = 0x700000,
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.offset = 0x00100000,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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.bits_per_word = 8,
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};
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#endif
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#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
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/* SPI ADC chip */
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static struct bfin5xx_spi_chip spi_adc_chip_info = {
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.enable_dma = 1, /* use dma transfer with this chip*/
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.bits_per_word = 16,
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};
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#endif
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#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
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static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
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.enable_dma = 0,
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.bits_per_word = 16,
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};
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#endif
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#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
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static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
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.enable_dma = 0,
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.bits_per_word = 16,
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};
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#endif
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#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
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static struct bfin5xx_spi_chip spi_mmc_chip_info = {
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.enable_dma = 1,
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.bits_per_word = 8,
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
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{
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.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
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.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. */
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.platform_data = NULL, /* No spi_driver specific config */
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.controller_data = &spi_adc_chip_info,
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},
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#endif
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#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
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{
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.modalias = "ad1836-spi",
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.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
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.controller_data = &ad1836_spi_chip_info,
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},
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#endif
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#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
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{
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.modalias = "ad9960-spi",
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.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 1,
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.controller_data = &ad9960_spi_chip_info,
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},
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#endif
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#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
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{
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.modalias = "spi_mmc",
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = CONFIG_SPI_MMC_CS_CHAN,
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.platform_data = NULL,
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.controller_data = &spi_mmc_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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};
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static struct platform_device bfin_spi0_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &bfin_spi0_info, /* Passed to driver */
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},
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};
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#endif /* spi master and devices */
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#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
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static struct platform_device hitachi_fb_device = {
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.name = "hitachi-tx09",
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};
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#endif
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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static struct resource smc91x_resources[] = {
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{
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.name = "smc91x-regs",
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.start = 0x28000300,
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.end = 0x28000300 + 16,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF0,
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.end = IRQ_PF0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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#endif
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#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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static struct resource isp1362_hcd_resources[] = {
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{
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.start = 0x24008000,
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.end = 0x24008000,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0x24008004,
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.end = 0x24008004,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF47,
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.end = IRQ_PF47,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct isp1362_platform_data isp1362_priv = {
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.sel15Kres = 1,
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.clknotstop = 0,
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.oc_enable = 0,
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.int_act_high = 0,
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.int_edge_triggered = 0,
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.remote_wakeup_connected = 0,
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.no_power_switching = 1,
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.power_switching_mode = 0,
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};
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static struct platform_device isp1362_hcd_device = {
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.name = "isp1362-hcd",
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.id = 0,
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.dev = {
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.platform_data = &isp1362_priv,
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},
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.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
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.resource = isp1362_hcd_resources,
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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static struct resource bfin_uart_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device bfin_uart_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart_resources),
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.resource = bfin_uart_resources,
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};
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#endif
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#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
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#define PATA_INT 119
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static struct pata_platform_info bfin_pata_platform_data = {
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.ioport_shift = 2,
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.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
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};
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static struct resource bfin_pata_resources[] = {
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{
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.start = 0x2400C000,
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.end = 0x2400C001F,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x2400D018,
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.end = 0x2400D01B,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = PATA_INT,
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.end = PATA_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_pata_device = {
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.name = "pata_platform",
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.id = -1,
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.num_resources = ARRAY_SIZE(bfin_pata_resources),
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.resource = bfin_pata_resources,
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.dev = {
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.platform_data = &bfin_pata_platform_data,
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}
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};
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#endif
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static struct platform_device *cm_bf561_devices[] __initdata = {
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#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
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&hitachi_fb_device,
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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&bfin_uart_device,
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#endif
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#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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&isp1362_hcd_device,
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#endif
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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&smc91x_device,
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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&bfin_spi0_device,
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#endif
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#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
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&bfin_pata_device,
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#endif
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};
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static int __init cm_bf561_init(void)
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{
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printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
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platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
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#endif
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#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
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irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
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#endif
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return 0;
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}
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arch_initcall(cm_bf561_init);
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