87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
/*
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* Pin definitions for AT32AP7000.
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_AT32AP700X_H__
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#define __ASM_ARCH_AT32AP700X_H__
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#define GPIO_PERIPH_A 0
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#define GPIO_PERIPH_B 1
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/*
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* Pin numbers identifying specific GPIO pins on the chip. They can
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* also be converted to IRQ numbers by passing them through
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* gpio_to_irq().
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*/
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#define GPIO_PIOA_BASE (0)
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#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
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#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
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#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
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#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
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#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
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#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
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#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
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#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
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#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
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/*
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* DMAC peripheral hardware handshaking interfaces, used with dw_dmac
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*/
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#define DMAC_MCI_RX 0
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#define DMAC_MCI_TX 1
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#define DMAC_DAC_TX 2
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#define DMAC_AC97_A_RX 3
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#define DMAC_AC97_A_TX 4
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#define DMAC_AC97_B_RX 5
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#define DMAC_AC97_B_TX 6
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#define DMAC_DMAREQ_0 7
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#define DMAC_DMAREQ_1 8
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#define DMAC_DMAREQ_2 9
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#define DMAC_DMAREQ_3 10
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/* HSB master IDs */
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#define HMATRIX_MASTER_CPU_DCACHE 0
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#define HMATRIX_MASTER_CPU_ICACHE 1
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#define HMATRIX_MASTER_PDC 2
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#define HMATRIX_MASTER_ISI 3
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#define HMATRIX_MASTER_USBA 4
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#define HMATRIX_MASTER_LCDC 5
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#define HMATRIX_MASTER_MACB0 6
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#define HMATRIX_MASTER_MACB1 7
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#define HMATRIX_MASTER_DMACA_M0 8
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#define HMATRIX_MASTER_DMACA_M1 9
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/* HSB slave IDs */
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#define HMATRIX_SLAVE_SRAM0 0
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#define HMATRIX_SLAVE_SRAM1 1
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#define HMATRIX_SLAVE_PBA 2
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#define HMATRIX_SLAVE_PBB 3
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#define HMATRIX_SLAVE_EBI 4
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#define HMATRIX_SLAVE_USBA 5
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#define HMATRIX_SLAVE_LCDC 6
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#define HMATRIX_SLAVE_DMACA 7
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/* Bits in HMATRIX SFR4 (EBI) */
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#define HMATRIX_EBI_SDRAM_ENABLE (1 << 1)
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#define HMATRIX_EBI_NAND_ENABLE (1 << 3)
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#define HMATRIX_EBI_CF0_ENABLE (1 << 4)
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#define HMATRIX_EBI_CF1_ENABLE (1 << 5)
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#define HMATRIX_EBI_PULLUP_DISABLE (1 << 8)
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/*
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* Base addresses of controllers that may be accessed early by
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* platform code.
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*/
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#define PM_BASE 0xfff00000
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#define HMATRIX_BASE 0xfff00800
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#define SDRAMC_BASE 0xfff03800
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#endif /* __ASM_ARCH_AT32AP700X_H__ */
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