126 lines
3.3 KiB
C
126 lines
3.3 KiB
C
/*
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* linux/arch/sh/boards/se/770x/irq.c
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*
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* Copyright (C) 2000 Kazumoto Kojima
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* Copyright (C) 2006 Nobuhiro Iwamatsu
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*
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* Hitachi SolutionEngine Support.
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*
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/se.h>
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/*
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* If the problem of make_ipr_irq is solved,
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* this code will become unnecessary. :-)
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*/
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static void se770x_disable_ipr_irq(unsigned int irq)
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{
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struct ipr_data *p = get_irq_chip_data(irq);
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ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
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}
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static void se770x_enable_ipr_irq(unsigned int irq)
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{
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struct ipr_data *p = get_irq_chip_data(irq);
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ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
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}
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static struct irq_chip se770x_irq_chip = {
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.name = "MS770xSE-FPGA",
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.mask = se770x_disable_ipr_irq,
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.unmask = se770x_enable_ipr_irq,
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.mask_ack = se770x_disable_ipr_irq,
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};
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void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
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{
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int i;
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for (i = 0; i < nr_irqs; i++) {
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unsigned int irq = table[i].irq;
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disable_irq_nosync(irq);
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set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
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handle_level_irq, "level");
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set_irq_chip_data(irq, &table[i]);
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se770x_enable_ipr_irq(irq);
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}
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}
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static struct ipr_data se770x_ipr_map[] = {
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#if defined(CONFIG_CPU_SUBTYPE_SH7705)
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/* This is default value */
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{ 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA},
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{ 0xf-0xa, 0, 4, 0xa , BCR_ILCRA},
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{ 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB},
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{ 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC},
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{ 0xf-0xc, 0, 0, 0xc , BCR_ILCRC},
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{ 0xf-0xe, 0, 12, 0xe , BCR_ILCRD},
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{ 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */
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{ 0xf-0xd, 0, 8, 0xd , BCR_ILCRE},
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{ 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE},
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{ 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE},
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{ 0xf-0xf, 0, 12, 0xf , BCR_ILCRF},
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{ 0xf-0xb, 0, 4, 0xb , BCR_ILCRF},
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{ 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG},
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{ 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG},
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{ 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG},
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#else
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{ 14, 0, 8, 0x0f-14 ,BCR_ILCRA},
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{ 12, 0, 4, 0x0f-12 ,BCR_ILCRA},
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{ 8, 0, 4, 0x0f- 8 ,BCR_ILCRB},
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{ 6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
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{ 5, 0, 8, 0x0f- 5 ,BCR_ILCRC},
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{ 4, 0, 4, 0x0f- 4 ,BCR_ILCRC},
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{ 3, 0, 0, 0x0f- 3 ,BCR_ILCRC},
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{ 1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
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/* ST NIC */
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{ 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */
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/* MRSHPC IRQs setting */
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{ 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */
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{ 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */
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{ 9, 0, 4, 0x0f- 9 ,BCR_ILCRE}, /* PCIRQ1 */
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{ 7, 0, 0, 0x0f- 7 ,BCR_ILCRE}, /* PCIRQ0 */
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/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
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/* NOTE: #2 and #13 are not used on PC */
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{ 13, 0, 4, 0x0f-13 ,BCR_ILCRG}, /* SLOTIRQ2 */
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{ 2, 0, 0, 0x0f- 2 ,BCR_ILCRG}, /* SLOTIRQ1 */
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#endif
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};
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/*
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* Initialize IRQ setting
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*/
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void __init init_se_IRQ(void)
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{
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/*
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* Super I/O (Just mimic PC):
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* 1: keyboard
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* 3: serial 0
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* 4: serial 1
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* 5: printer
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* 6: floppy
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* 8: rtc
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* 12: mouse
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* 14: ide0
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*/
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#if defined(CONFIG_CPU_SUBTYPE_SH7705)
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/* Disable all interrupts */
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ctrl_outw(0, BCR_ILCRA);
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ctrl_outw(0, BCR_ILCRB);
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ctrl_outw(0, BCR_ILCRC);
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ctrl_outw(0, BCR_ILCRD);
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ctrl_outw(0, BCR_ILCRE);
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ctrl_outw(0, BCR_ILCRF);
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ctrl_outw(0, BCR_ILCRG);
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#endif
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make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
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}
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