70 lines
1.7 KiB
ArmAsm
70 lines
1.7 KiB
ArmAsm
/* MN10300 CPU cache invalidation routines, using automatic purge registers
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*
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* Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <linux/sys.h>
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#include <linux/linkage.h>
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#include <asm/cache.h>
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#include <asm/irqflags.h>
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#include <asm/cacheflush.h>
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#include "cache.inc"
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.am33_2
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.globl debugger_local_cache_flushinv_one
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###############################################################################
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#
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# void debugger_local_cache_flushinv_one(u8 *addr)
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#
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# Invalidate one particular cacheline if it's in the icache
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#
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###############################################################################
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ALIGN
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.globl debugger_local_cache_flushinv_one
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.type debugger_local_cache_flushinv_one,@function
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debugger_local_cache_flushinv_one:
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mov d0,a1
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mov CHCTR,a0
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movhu (a0),d0
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btst CHCTR_ICEN,d0
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beq mn10300_local_icache_inv_range_reg_end
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LOCAL_CLI_SAVE(d1)
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mov ICIVCR,a0
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# wait for the invalidator to quiesce
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setlb
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mov (a0),d0
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btst ICIVCR_ICIVBSY,d0
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lne
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# set the mask
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mov ~L1_CACHE_TAG_MASK,d0
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mov d0,(ICIVMR)
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# invalidate the cache line at the given address
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and ~L1_CACHE_TAG_MASK,a1
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or ICIVCR_ICI,a1
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mov a1,(a0)
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# wait for the invalidator to quiesce again
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setlb
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mov (a0),d0
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btst ICIVCR_ICIVBSY,d0
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lne
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LOCAL_IRQ_RESTORE(d1)
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mn10300_local_icache_inv_range_reg_end:
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ret [],0
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.size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one
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