164 lines
3.9 KiB
C
164 lines
3.9 KiB
C
/*
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* linux/arch/arm/mach-omap/mux.c
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*
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* Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
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*
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* Copyright (C) 2003 Nokia Corporation
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*
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* Written by Tony Lindgren <tony.lindgren@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <linux/spinlock.h>
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#define __MUX_C__
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#include <asm/arch/mux.h>
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#ifdef CONFIG_OMAP_MUX
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/*
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* Sets the Omap MUX and PULL_DWN registers based on the table
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*/
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int __init_or_module
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omap_cfg_reg(const reg_cfg_t reg_cfg)
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{
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static DEFINE_SPINLOCK(mux_spin_lock);
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unsigned long flags;
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reg_cfg_set *cfg;
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unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
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pull_orig = 0, pull = 0;
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unsigned int mask, warn = 0;
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if (reg_cfg > ARRAY_SIZE(reg_cfg_table)) {
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printk(KERN_ERR "MUX: reg_cfg %d\n", reg_cfg);
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return -EINVAL;
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}
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cfg = ®_cfg_table[reg_cfg];
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/*
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* We do a pretty long section here with lock on, but pin muxing
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* should only happen on driver init for each driver, so it's not time
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* critical.
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*/
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spin_lock_irqsave(&mux_spin_lock, flags);
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/* Check the mux register in question */
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if (cfg->mux_reg) {
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unsigned tmp1, tmp2;
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reg_orig = omap_readl(cfg->mux_reg);
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/* The mux registers always seem to be 3 bits long */
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mask = (0x7 << cfg->mask_offset);
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tmp1 = reg_orig & mask;
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reg = reg_orig & ~mask;
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tmp2 = (cfg->mask << cfg->mask_offset);
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reg |= tmp2;
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if (tmp1 != tmp2)
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warn = 1;
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omap_writel(reg, cfg->mux_reg);
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}
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/* Check for pull up or pull down selection on 1610 */
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if (!cpu_is_omap1510()) {
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if (cfg->pu_pd_reg && cfg->pull_val) {
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pu_pd_orig = omap_readl(cfg->pu_pd_reg);
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mask = 1 << cfg->pull_bit;
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if (cfg->pu_pd_val) {
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if (!(pu_pd_orig & mask))
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warn = 1;
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/* Use pull up */
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pu_pd = pu_pd_orig | mask;
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} else {
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if (pu_pd_orig & mask)
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warn = 1;
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/* Use pull down */
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pu_pd = pu_pd_orig & ~mask;
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}
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omap_writel(pu_pd, cfg->pu_pd_reg);
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}
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}
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/* Check for an associated pull down register */
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if (cfg->pull_reg) {
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pull_orig = omap_readl(cfg->pull_reg);
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mask = 1 << cfg->pull_bit;
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if (cfg->pull_val) {
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if (pull_orig & mask)
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warn = 1;
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/* Low bit = pull enabled */
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pull = pull_orig & ~mask;
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} else {
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if (!(pull_orig & mask))
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warn = 1;
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/* High bit = pull disabled */
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pull = pull_orig | mask;
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}
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omap_writel(pull, cfg->pull_reg);
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}
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if (warn) {
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#ifdef CONFIG_OMAP_MUX_WARNINGS
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printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
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#endif
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}
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#ifdef CONFIG_OMAP_MUX_DEBUG
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if (cfg->debug || warn) {
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printk("MUX: Setting register %s\n", cfg->name);
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printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
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cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
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if (!cpu_is_omap1510()) {
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if (cfg->pu_pd_reg && cfg->pull_val) {
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printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
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cfg->pu_pd_name, cfg->pu_pd_reg,
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pu_pd_orig, pu_pd);
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}
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}
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if (cfg->pull_reg)
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printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
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cfg->pull_name, cfg->pull_reg, pull_orig, pull);
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}
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#endif
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spin_unlock_irqrestore(&mux_spin_lock, flags);
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#ifdef CONFIG_OMAP_MUX_ERRORS
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return warn ? -ETXTBSY : 0;
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#else
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return 0;
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#endif
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}
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EXPORT_SYMBOL(omap_cfg_reg);
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#endif /* CONFIG_OMAP_MUX */
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