512 lines
14 KiB
C
512 lines
14 KiB
C
/*
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* Kernel-based Virtual Machine driver for Linux
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*
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* This module enables machines with Intel VT-x extensions to run virtual
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* machines without emulation or binary translation.
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*
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* MMU support
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*
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* Copyright (C) 2006 Qumranet, Inc.
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*
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* Authors:
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* Yaniv Kamay <yaniv@qumranet.com>
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* Avi Kivity <avi@qumranet.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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/*
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* We need the mmu code to access both 32-bit and 64-bit guest ptes,
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* so the code in this file is compiled twice, once per pte size.
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*/
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#if PTTYPE == 64
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#define pt_element_t u64
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#define guest_walker guest_walker64
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#define FNAME(name) paging##64_##name
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#define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
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#define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
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#define PT_INDEX(addr, level) PT64_INDEX(addr, level)
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#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
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#define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
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#ifdef CONFIG_X86_64
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#define PT_MAX_FULL_LEVELS 4
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#else
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#define PT_MAX_FULL_LEVELS 2
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#endif
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#elif PTTYPE == 32
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#define pt_element_t u32
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#define guest_walker guest_walker32
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#define FNAME(name) paging##32_##name
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#define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
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#define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
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#define PT_INDEX(addr, level) PT32_INDEX(addr, level)
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#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
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#define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
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#define PT_MAX_FULL_LEVELS 2
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#else
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#error Invalid PTTYPE value
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#endif
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/*
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* The guest_walker structure emulates the behavior of the hardware page
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* table walker.
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*/
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struct guest_walker {
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int level;
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gfn_t table_gfn[PT_MAX_FULL_LEVELS];
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pt_element_t *table;
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pt_element_t pte;
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pt_element_t *ptep;
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struct page *page;
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int index;
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pt_element_t inherited_ar;
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gfn_t gfn;
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u32 error_code;
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};
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/*
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* Fetch a guest pte for a guest virtual address
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*/
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static int FNAME(walk_addr)(struct guest_walker *walker,
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struct kvm_vcpu *vcpu, gva_t addr,
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int write_fault, int user_fault, int fetch_fault)
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{
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hpa_t hpa;
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struct kvm_memory_slot *slot;
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pt_element_t *ptep;
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pt_element_t root;
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gfn_t table_gfn;
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pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
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walker->level = vcpu->mmu.root_level;
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walker->table = NULL;
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walker->page = NULL;
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walker->ptep = NULL;
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root = vcpu->cr3;
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#if PTTYPE == 64
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if (!is_long_mode(vcpu)) {
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walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
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root = *walker->ptep;
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walker->pte = root;
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if (!(root & PT_PRESENT_MASK))
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goto not_present;
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--walker->level;
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}
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#endif
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table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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walker->table_gfn[walker->level - 1] = table_gfn;
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pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
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walker->level - 1, table_gfn);
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slot = gfn_to_memslot(vcpu->kvm, table_gfn);
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hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
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walker->page = pfn_to_page(hpa >> PAGE_SHIFT);
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walker->table = kmap_atomic(walker->page, KM_USER0);
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ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
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(vcpu->cr3 & CR3_NONPAE_RESERVED_BITS) == 0);
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walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
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for (;;) {
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int index = PT_INDEX(addr, walker->level);
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hpa_t paddr;
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ptep = &walker->table[index];
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walker->index = index;
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ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
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((unsigned long)ptep & PAGE_MASK));
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if (!is_present_pte(*ptep))
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goto not_present;
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if (write_fault && !is_writeble_pte(*ptep))
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if (user_fault || is_write_protection(vcpu))
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goto access_error;
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if (user_fault && !(*ptep & PT_USER_MASK))
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goto access_error;
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#if PTTYPE == 64
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if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
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goto access_error;
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#endif
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if (!(*ptep & PT_ACCESSED_MASK)) {
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mark_page_dirty(vcpu->kvm, table_gfn);
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*ptep |= PT_ACCESSED_MASK;
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}
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if (walker->level == PT_PAGE_TABLE_LEVEL) {
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walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
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>> PAGE_SHIFT;
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break;
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}
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if (walker->level == PT_DIRECTORY_LEVEL
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&& (*ptep & PT_PAGE_SIZE_MASK)
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&& (PTTYPE == 64 || is_pse(vcpu))) {
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walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
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>> PAGE_SHIFT;
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walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
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break;
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}
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walker->inherited_ar &= walker->table[index];
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table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
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kunmap_atomic(walker->table, KM_USER0);
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paddr = safe_gpa_to_hpa(vcpu, table_gfn << PAGE_SHIFT);
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walker->page = pfn_to_page(paddr >> PAGE_SHIFT);
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walker->table = kmap_atomic(walker->page, KM_USER0);
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--walker->level;
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walker->table_gfn[walker->level - 1 ] = table_gfn;
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pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
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walker->level - 1, table_gfn);
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}
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walker->pte = *ptep;
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if (walker->page)
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walker->ptep = NULL;
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if (walker->table)
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kunmap_atomic(walker->table, KM_USER0);
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pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
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return 1;
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not_present:
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walker->error_code = 0;
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goto err;
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access_error:
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walker->error_code = PFERR_PRESENT_MASK;
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err:
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if (write_fault)
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walker->error_code |= PFERR_WRITE_MASK;
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if (user_fault)
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walker->error_code |= PFERR_USER_MASK;
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if (fetch_fault)
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walker->error_code |= PFERR_FETCH_MASK;
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if (walker->table)
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kunmap_atomic(walker->table, KM_USER0);
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return 0;
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}
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static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
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struct guest_walker *walker)
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{
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mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
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}
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static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
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u64 *shadow_pte,
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gpa_t gaddr,
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pt_element_t gpte,
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u64 access_bits,
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int user_fault,
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int write_fault,
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int *ptwrite,
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struct guest_walker *walker,
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gfn_t gfn)
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{
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hpa_t paddr;
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int dirty = gpte & PT_DIRTY_MASK;
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u64 spte = *shadow_pte;
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int was_rmapped = is_rmap_pte(spte);
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pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
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" user_fault %d gfn %lx\n",
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__FUNCTION__, spte, (u64)gpte, access_bits,
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write_fault, user_fault, gfn);
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if (write_fault && !dirty) {
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pt_element_t *guest_ent, *tmp = NULL;
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if (walker->ptep)
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guest_ent = walker->ptep;
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else {
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tmp = kmap_atomic(walker->page, KM_USER0);
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guest_ent = &tmp[walker->index];
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}
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*guest_ent |= PT_DIRTY_MASK;
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if (!walker->ptep)
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kunmap_atomic(tmp, KM_USER0);
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dirty = 1;
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FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
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}
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spte |= PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK;
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spte |= gpte & PT64_NX_MASK;
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if (!dirty)
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access_bits &= ~PT_WRITABLE_MASK;
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paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
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spte |= PT_PRESENT_MASK;
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if (access_bits & PT_USER_MASK)
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spte |= PT_USER_MASK;
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if (is_error_hpa(paddr)) {
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spte |= gaddr;
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spte |= PT_SHADOW_IO_MARK;
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spte &= ~PT_PRESENT_MASK;
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set_shadow_pte(shadow_pte, spte);
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return;
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}
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spte |= paddr;
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if ((access_bits & PT_WRITABLE_MASK)
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|| (write_fault && !is_write_protection(vcpu) && !user_fault)) {
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struct kvm_mmu_page *shadow;
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spte |= PT_WRITABLE_MASK;
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if (user_fault) {
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mmu_unshadow(vcpu, gfn);
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goto unshadowed;
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}
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shadow = kvm_mmu_lookup_page(vcpu, gfn);
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if (shadow) {
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pgprintk("%s: found shadow page for %lx, marking ro\n",
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__FUNCTION__, gfn);
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access_bits &= ~PT_WRITABLE_MASK;
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if (is_writeble_pte(spte)) {
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spte &= ~PT_WRITABLE_MASK;
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kvm_x86_ops->tlb_flush(vcpu);
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}
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if (write_fault)
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*ptwrite = 1;
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}
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}
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unshadowed:
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if (access_bits & PT_WRITABLE_MASK)
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mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
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set_shadow_pte(shadow_pte, spte);
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page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
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if (!was_rmapped)
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rmap_add(vcpu, shadow_pte);
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}
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static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t gpte,
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u64 *shadow_pte, u64 access_bits,
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int user_fault, int write_fault, int *ptwrite,
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struct guest_walker *walker, gfn_t gfn)
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{
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access_bits &= gpte;
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FNAME(set_pte_common)(vcpu, shadow_pte, gpte & PT_BASE_ADDR_MASK,
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gpte, access_bits, user_fault, write_fault,
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ptwrite, walker, gfn);
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}
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static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
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u64 *spte, const void *pte, int bytes)
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{
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pt_element_t gpte;
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if (bytes < sizeof(pt_element_t))
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return;
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gpte = *(const pt_element_t *)pte;
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if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
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return;
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pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
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FNAME(set_pte)(vcpu, gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
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0, NULL, NULL,
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(gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
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}
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static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t gpde,
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u64 *shadow_pte, u64 access_bits,
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int user_fault, int write_fault, int *ptwrite,
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struct guest_walker *walker, gfn_t gfn)
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{
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gpa_t gaddr;
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access_bits &= gpde;
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gaddr = (gpa_t)gfn << PAGE_SHIFT;
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if (PTTYPE == 32 && is_cpuid_PSE36())
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gaddr |= (gpde & PT32_DIR_PSE36_MASK) <<
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(32 - PT32_DIR_PSE36_SHIFT);
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FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
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gpde, access_bits, user_fault, write_fault,
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ptwrite, walker, gfn);
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}
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/*
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* Fetch a shadow pte for a specific level in the paging hierarchy.
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*/
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static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
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struct guest_walker *walker,
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int user_fault, int write_fault, int *ptwrite)
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{
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hpa_t shadow_addr;
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int level;
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u64 *shadow_ent;
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u64 *prev_shadow_ent = NULL;
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if (!is_present_pte(walker->pte))
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return NULL;
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shadow_addr = vcpu->mmu.root_hpa;
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level = vcpu->mmu.shadow_root_level;
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if (level == PT32E_ROOT_LEVEL) {
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shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
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shadow_addr &= PT64_BASE_ADDR_MASK;
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--level;
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}
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for (; ; level--) {
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u32 index = SHADOW_PT_INDEX(addr, level);
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struct kvm_mmu_page *shadow_page;
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u64 shadow_pte;
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int metaphysical;
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gfn_t table_gfn;
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unsigned hugepage_access = 0;
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shadow_ent = ((u64 *)__va(shadow_addr)) + index;
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if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
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if (level == PT_PAGE_TABLE_LEVEL)
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break;
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shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
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prev_shadow_ent = shadow_ent;
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continue;
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}
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if (level == PT_PAGE_TABLE_LEVEL)
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break;
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if (level - 1 == PT_PAGE_TABLE_LEVEL
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&& walker->level == PT_DIRECTORY_LEVEL) {
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metaphysical = 1;
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hugepage_access = walker->pte;
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hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
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if (walker->pte & PT64_NX_MASK)
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hugepage_access |= (1 << 2);
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hugepage_access >>= PT_WRITABLE_SHIFT;
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table_gfn = (walker->pte & PT_BASE_ADDR_MASK)
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>> PAGE_SHIFT;
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} else {
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metaphysical = 0;
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table_gfn = walker->table_gfn[level - 2];
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}
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shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
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metaphysical, hugepage_access,
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shadow_ent);
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shadow_addr = __pa(shadow_page->spt);
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shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
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| PT_WRITABLE_MASK | PT_USER_MASK;
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*shadow_ent = shadow_pte;
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prev_shadow_ent = shadow_ent;
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}
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if (walker->level == PT_DIRECTORY_LEVEL) {
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FNAME(set_pde)(vcpu, walker->pte, shadow_ent,
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walker->inherited_ar, user_fault, write_fault,
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ptwrite, walker, walker->gfn);
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} else {
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ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
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FNAME(set_pte)(vcpu, walker->pte, shadow_ent,
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walker->inherited_ar, user_fault, write_fault,
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ptwrite, walker, walker->gfn);
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}
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return shadow_ent;
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}
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/*
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* Page fault handler. There are several causes for a page fault:
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* - there is no shadow pte for the guest pte
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* - write access through a shadow pte marked read only so that we can set
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* the dirty bit
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* - write access to a shadow pte marked read only so we can update the page
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* dirty bitmap, when userspace requests it
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* - mmio access; in this case we will never install a present shadow pte
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* - normal guest page fault due to the guest pte marked not present, not
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* writable, or not executable
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*
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* Returns: 1 if we need to emulate the instruction, 0 otherwise, or
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* a negative value on error.
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*/
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static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
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u32 error_code)
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{
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int write_fault = error_code & PFERR_WRITE_MASK;
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int user_fault = error_code & PFERR_USER_MASK;
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int fetch_fault = error_code & PFERR_FETCH_MASK;
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struct guest_walker walker;
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u64 *shadow_pte;
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int write_pt = 0;
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int r;
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pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
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kvm_mmu_audit(vcpu, "pre page fault");
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r = mmu_topup_memory_caches(vcpu);
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if (r)
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return r;
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/*
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* Look up the shadow pte for the faulting address.
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*/
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r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
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fetch_fault);
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/*
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* The page is not mapped by the guest. Let the guest handle it.
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*/
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if (!r) {
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pgprintk("%s: guest page fault\n", __FUNCTION__);
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inject_page_fault(vcpu, addr, walker.error_code);
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vcpu->last_pt_write_count = 0; /* reset fork detector */
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return 0;
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}
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shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
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&write_pt);
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pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
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shadow_pte, *shadow_pte, write_pt);
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if (!write_pt)
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vcpu->last_pt_write_count = 0; /* reset fork detector */
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/*
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* mmio: emulate if accessible, otherwise its a guest fault.
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*/
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if (is_io_pte(*shadow_pte))
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return 1;
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++vcpu->stat.pf_fixed;
|
|
kvm_mmu_audit(vcpu, "post page fault (fixed)");
|
|
|
|
return write_pt;
|
|
}
|
|
|
|
static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
|
|
{
|
|
struct guest_walker walker;
|
|
gpa_t gpa = UNMAPPED_GVA;
|
|
int r;
|
|
|
|
r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
|
|
|
|
if (r) {
|
|
gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
|
|
gpa |= vaddr & ~PAGE_MASK;
|
|
}
|
|
|
|
return gpa;
|
|
}
|
|
|
|
#undef pt_element_t
|
|
#undef guest_walker
|
|
#undef FNAME
|
|
#undef PT_BASE_ADDR_MASK
|
|
#undef PT_INDEX
|
|
#undef SHADOW_PT_INDEX
|
|
#undef PT_LEVEL_MASK
|
|
#undef PT_DIR_BASE_ADDR_MASK
|
|
#undef PT_MAX_FULL_LEVELS
|