293 lines
7.1 KiB
C
293 lines
7.1 KiB
C
/*
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* arch/sh/drivers/dma/dma-api.c
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*
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* SuperH-specific DMA management API
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*
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* Copyright (C) 2003, 2004 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/proc_fs.h>
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#include <linux/list.h>
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#include <asm/dma.h>
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DEFINE_SPINLOCK(dma_spin_lock);
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static LIST_HEAD(registered_dmac_list);
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/*
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* A brief note about the reasons for this API as it stands.
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*
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* For starters, the old ISA DMA API didn't work for us for a number of
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* reasons, for one, the vast majority of channels on the SH DMAC are
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* dual-address mode only, and both the new and the old DMA APIs are after the
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* concept of managing a DMA buffer, which doesn't overly fit this model very
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* well. In addition to which, the new API is largely geared at IOMMUs and
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* GARTs, and doesn't even support the channel notion very well.
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*
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* The other thing that's a marginal issue, is the sheer number of random DMA
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* engines that are present (ie, in boards like the Dreamcast), some of which
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* cascade off of the SH DMAC, and others do not. As such, there was a real
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* need for a scalable subsystem that could deal with both single and
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* dual-address mode usage, in addition to interoperating with cascaded DMACs.
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*
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* There really isn't any reason why this needs to be SH specific, though I'm
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* not aware of too many other processors (with the exception of some MIPS)
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* that have the same concept of a dual address mode, or any real desire to
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* actually make use of the DMAC even if such a subsystem were exposed
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* elsewhere.
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*
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* The idea for this was derived from the ARM port, which acted as an excellent
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* reference when trying to address these issues.
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*
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* It should also be noted that the decision to add Yet Another DMA API(tm) to
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* the kernel wasn't made easily, and was only decided upon after conferring
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* with jejb with regards to the state of the old and new APIs as they applied
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* to these circumstances. Philip Blundell was also a great help in figuring
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* out some single-address mode DMA semantics that were otherwise rather
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* confusing.
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*/
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struct dma_info *get_dma_info(unsigned int chan)
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{
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struct list_head *pos, *tmp;
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unsigned int total = 0;
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/*
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* Look for each DMAC's range to determine who the owner of
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* the channel is.
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*/
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list_for_each_safe(pos, tmp, ®istered_dmac_list) {
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struct dma_info *info = list_entry(pos, struct dma_info, list);
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total += info->nr_channels;
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if (chan > total)
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continue;
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return info;
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}
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return NULL;
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}
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struct dma_channel *get_dma_channel(unsigned int chan)
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{
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struct dma_info *info = get_dma_info(chan);
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if (!info)
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return ERR_PTR(-EINVAL);
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return info->channels + chan;
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}
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int get_dma_residue(unsigned int chan)
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{
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struct dma_info *info = get_dma_info(chan);
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struct dma_channel *channel = &info->channels[chan];
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if (info->ops->get_residue)
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return info->ops->get_residue(channel);
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return 0;
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}
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int request_dma(unsigned int chan, const char *dev_id)
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{
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struct dma_info *info = get_dma_info(chan);
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struct dma_channel *channel = &info->channels[chan];
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down(&channel->sem);
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if (!info->ops || chan >= MAX_DMA_CHANNELS) {
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up(&channel->sem);
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return -EINVAL;
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}
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atomic_set(&channel->busy, 1);
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strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id));
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up(&channel->sem);
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if (info->ops->request)
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return info->ops->request(channel);
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return 0;
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}
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void free_dma(unsigned int chan)
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{
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struct dma_info *info = get_dma_info(chan);
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struct dma_channel *channel = &info->channels[chan];
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if (info->ops->free)
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info->ops->free(channel);
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atomic_set(&channel->busy, 0);
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}
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void dma_wait_for_completion(unsigned int chan)
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{
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struct dma_info *info = get_dma_info(chan);
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struct dma_channel *channel = &info->channels[chan];
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if (channel->flags & DMA_TEI_CAPABLE) {
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wait_event(channel->wait_queue,
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(info->ops->get_residue(channel) == 0));
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return;
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}
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while (info->ops->get_residue(channel))
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cpu_relax();
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}
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void dma_configure_channel(unsigned int chan, unsigned long flags)
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{
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struct dma_info *info = get_dma_info(chan);
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struct dma_channel *channel = &info->channels[chan];
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if (info->ops->configure)
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info->ops->configure(channel, flags);
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}
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int dma_xfer(unsigned int chan, unsigned long from,
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unsigned long to, size_t size, unsigned int mode)
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{
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struct dma_info *info = get_dma_info(chan);
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struct dma_channel *channel = &info->channels[chan];
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channel->sar = from;
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channel->dar = to;
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channel->count = size;
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channel->mode = mode;
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return info->ops->xfer(channel);
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}
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#ifdef CONFIG_PROC_FS
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static int dma_read_proc(char *buf, char **start, off_t off,
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int len, int *eof, void *data)
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{
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struct list_head *pos, *tmp;
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char *p = buf;
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if (list_empty(®istered_dmac_list))
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return 0;
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/*
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* Iterate over each registered DMAC
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*/
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list_for_each_safe(pos, tmp, ®istered_dmac_list) {
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struct dma_info *info = list_entry(pos, struct dma_info, list);
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int i;
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/*
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* Iterate over each channel
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*/
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for (i = 0; i < info->nr_channels; i++) {
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struct dma_channel *channel = info->channels + i;
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if (!(channel->flags & DMA_CONFIGURED))
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continue;
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p += sprintf(p, "%2d: %14s %s\n", i,
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info->name, channel->dev_id);
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}
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}
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return p - buf;
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}
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#endif
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int __init register_dmac(struct dma_info *info)
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{
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int i;
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INIT_LIST_HEAD(&info->list);
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printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n",
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info->name, info->nr_channels,
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info->nr_channels > 1 ? "s" : "");
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BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
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/*
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* Don't touch pre-configured channels
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*/
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if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) {
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unsigned int size;
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size = sizeof(struct dma_channel) * info->nr_channels;
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info->channels = kmalloc(size, GFP_KERNEL);
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if (!info->channels)
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return -ENOMEM;
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memset(info->channels, 0, size);
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}
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for (i = 0; i < info->nr_channels; i++) {
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struct dma_channel *chan = info->channels + i;
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chan->chan = i;
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memcpy(chan->dev_id, "Unused", 7);
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if (info->flags & DMAC_CHANNELS_TEI_CAPABLE)
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chan->flags |= DMA_TEI_CAPABLE;
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init_MUTEX(&chan->sem);
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init_waitqueue_head(&chan->wait_queue);
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#ifdef CONFIG_SYSFS
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dma_create_sysfs_files(chan);
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#endif
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}
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list_add(&info->list, ®istered_dmac_list);
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return 0;
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}
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void __exit unregister_dmac(struct dma_info *info)
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{
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if (!(info->flags & DMAC_CHANNELS_CONFIGURED))
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kfree(info->channels);
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list_del(&info->list);
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}
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static int __init dma_api_init(void)
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{
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printk("DMA: Registering DMA API.\n");
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#ifdef CONFIG_PROC_FS
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create_proc_read_entry("dma", 0, 0, dma_read_proc, 0);
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#endif
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return 0;
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}
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subsys_initcall(dma_api_init);
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MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
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MODULE_DESCRIPTION("DMA API for SuperH");
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MODULE_LICENSE("GPL");
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EXPORT_SYMBOL(request_dma);
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EXPORT_SYMBOL(free_dma);
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EXPORT_SYMBOL(register_dmac);
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EXPORT_SYMBOL(get_dma_residue);
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EXPORT_SYMBOL(get_dma_info);
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EXPORT_SYMBOL(get_dma_channel);
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EXPORT_SYMBOL(dma_xfer);
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EXPORT_SYMBOL(dma_wait_for_completion);
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EXPORT_SYMBOL(dma_configure_channel);
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