120 lines
3.3 KiB
C
120 lines
3.3 KiB
C
/*
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* arch/sh/boards/overdrive/time.c
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*
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* Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
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* Copyright (C) 2002 Paul Mundt (lethal@chaoticdreams.org)
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* STMicroelectronics Overdrive Support.
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*/
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void od_time_init(void)
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{
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struct frqcr_data {
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unsigned short frqcr;
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struct {
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unsigned char multiplier;
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unsigned char divisor;
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} factor[3];
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};
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static struct frqcr_data st40_frqcr_table[] = {
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{ 0x000, {{1,1}, {1,1}, {1,2}}},
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{ 0x002, {{1,1}, {1,1}, {1,4}}},
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{ 0x004, {{1,1}, {1,1}, {1,8}}},
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{ 0x008, {{1,1}, {1,2}, {1,2}}},
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{ 0x00A, {{1,1}, {1,2}, {1,4}}},
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{ 0x00C, {{1,1}, {1,2}, {1,8}}},
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{ 0x011, {{1,1}, {2,3}, {1,6}}},
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{ 0x013, {{1,1}, {2,3}, {1,3}}},
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{ 0x01A, {{1,1}, {1,2}, {1,4}}},
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{ 0x01C, {{1,1}, {1,2}, {1,8}}},
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{ 0x023, {{1,1}, {2,3}, {1,3}}},
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{ 0x02C, {{1,1}, {1,2}, {1,8}}},
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{ 0x048, {{1,2}, {1,2}, {1,4}}},
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{ 0x04A, {{1,2}, {1,2}, {1,6}}},
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{ 0x04C, {{1,2}, {1,2}, {1,8}}},
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{ 0x05A, {{1,2}, {1,3}, {1,6}}},
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{ 0x05C, {{1,2}, {1,3}, {1,6}}},
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{ 0x063, {{1,2}, {1,4}, {1,4}}},
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{ 0x06C, {{1,2}, {1,4}, {1,8}}},
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{ 0x091, {{1,3}, {1,3}, {1,6}}},
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{ 0x093, {{1,3}, {1,3}, {1,6}}},
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{ 0x0A3, {{1,3}, {1,6}, {1,6}}},
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{ 0x0DA, {{1,4}, {1,4}, {1,8}}},
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{ 0x0DC, {{1,4}, {1,4}, {1,8}}},
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{ 0x0EC, {{1,4}, {1,8}, {1,8}}},
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{ 0x123, {{1,4}, {1,4}, {1,8}}},
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{ 0x16C, {{1,4}, {1,8}, {1,8}}},
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};
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struct memclk_data {
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unsigned char multiplier;
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unsigned char divisor;
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};
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static struct memclk_data st40_memclk_table[8] = {
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{1,1}, // 000
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{1,2}, // 001
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{1,3}, // 010
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{2,3}, // 011
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{1,4}, // 100
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{1,6}, // 101
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{1,8}, // 110
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{1,8} // 111
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};
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unsigned long pvr;
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/*
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* This should probably be moved into the SH3 probing code, and then
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* use the processor structure to determine which CPU we are running
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* on.
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*/
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pvr = ctrl_inl(CCN_PVR);
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printk("PVR %08x\n", pvr);
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if (((pvr >> CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1) {
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/*
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* Unfortunatly the STB1 FRQCR values are different from the
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* 7750 ones.
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*/
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struct frqcr_data *d;
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int a;
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unsigned long memclkcr;
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struct memclk_data *e;
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for (a=0; a<ARRAY_SIZE(st40_frqcr_table); a++) {
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d = &st40_frqcr_table[a];
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if (d->frqcr == (frqcr & 0x1ff))
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break;
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}
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if (a == ARRAY_SIZE(st40_frqcr_table)) {
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d = st40_frqcr_table;
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printk("ERROR: Unrecognised FRQCR value, using default multipliers\n");
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}
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memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR);
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e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK];
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printk("Clock multipliers: CPU: %d/%d Bus: %d/%d Mem: %d/%d Periph: %d/%d\n",
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d->factor[0].multiplier, d->factor[0].divisor,
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d->factor[1].multiplier, d->factor[1].divisor,
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e->multiplier, e->divisor,
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d->factor[2].multiplier, d->factor[2].divisor);
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current_cpu_data.master_clock = current_cpu_data.module_clock *
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d->factor[2].divisor /
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d->factor[2].multiplier;
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current_cpu_data.bus_clock = current_cpu_data.master_clock *
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d->factor[1].multiplier /
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d->factor[1].divisor;
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current_cpu_data.memory_clock = current_cpu_data.master_clock *
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e->multiplier / e->divisor;
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current_cpu_data.cpu_clock = current_cpu_data.master_clock *
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d->factor[0].multiplier /
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d->factor[0].divisor;
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}
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