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Pavel Roskin a1fdf6940a [POWERPC] Assign all PCI busses on G3 Blue & White 
G3 Blue & White is misconfigured by default so that CardBus controllers
in PCI slots don't work.  The PCI bridge is programmed to only allow
access to bus 1 but not higher busses.

The patch forces the PCI busses to be reassigned if a Grackle controller
is found and the machine identifies itself as "PowerMac1,1"

Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
 		2007-02-07 14:03:22 +11:00
..
qe_lib
…
Makefile [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
commproc.c [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
cpm2_common.c
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cpm2_pic.c [POWERPC] cpm2: CPM2 interrupt controller fix 2007-02-07 14:03:20 +11:00
cpm2_pic.h [POWERPC] cpm2: CPM2 interrupt controller fix 2007-02-07 14:03:20 +11:00
dart.h
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dart_iommu.c
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dcr-low.S
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dcr.c
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fsl_soc.c
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fsl_soc.h
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grackle.c [POWERPC] Assign all PCI busses on G3 Blue & White 2007-02-07 14:03:22 +11:00
i8259.c
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indirect_pci.c
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ipic.c
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ipic.h
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micropatch.c [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
mmio_nvram.c
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mpc8xx_pic.c [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
mpc8xx_pic.h [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
mpic.c [POWERPC] MPIC: support more than 256 sources 2007-02-07 14:03:19 +11:00
rom.c
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tsi108_dev.c
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tsi108_pci.c
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