Nicolas Pitre 18afea04f1 [ARM] 3294/1: don't invalidate individual BTB entries on ARMv6 ... Patch from Nicolas Pitre Doing so adds a much larger cost to the loop than the cost implied by simply invalidating the whole BTB at once. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2006-02-01 19:26:01 +00:00
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Kconfig	…
Makefile	…
abort-ev4.S	…
abort-ev4t.S	…
abort-ev5t.S	…
abort-ev5tj.S	…
abort-ev6.S	…
abort-lv4t.S	…
abort-macro.S	…
alignment.c	…
cache-v3.S	…
cache-v4.S	…
cache-v4wb.S	…
cache-v4wt.S	…
cache-v6.S	[ARM] 3294/1: don't invalidate individual BTB entries on ARMv6	2006-02-01 19:26:01 +00:00
consistent.c	…
copypage-v3.S	…
copypage-v4mc.c	…
copypage-v4wb.S	…
copypage-v4wt.S	…
copypage-v6.c	…
copypage-xscale.c	…
discontig.c	…
extable.c	…
fault-armv.c	…
fault.c	…
fault.h	…
flush.c	…
init.c	…
ioremap.c	…
mm-armv.c	[ARM] 3269/1: Add ARMv6 MT_NONSHARED_DEVICE mem_types[] index	2006-01-26 15:21:28 +00:00
mmap.c	…
mmu.c	…
proc-arm6_7.S	…
proc-arm720.S	…
proc-arm920.S	…
proc-arm922.S	…
proc-arm925.S	…
proc-arm926.S	…
proc-arm1020.S	…
proc-arm1020e.S	…
proc-arm1022.S	…
proc-arm1026.S	…
proc-macros.S	…
proc-sa110.S	…
proc-sa1100.S	…
proc-syms.c	…
proc-v6.S	…
proc-xscale.S	[ARM] 3293/1: don't invalidate the whole I-cache with xscale_coherent_user_range	2006-02-01 19:26:01 +00:00
tlb-v3.S	…
tlb-v4.S	…
tlb-v4wb.S	…
tlb-v4wbi.S	…
tlb-v6.S	…