524 lines
12 KiB
C
524 lines
12 KiB
C
/*
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* arch/ppc/platforms/pmac_low_i2c.c
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*
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* Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This file contains some low-level i2c access routines that
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* need to be used by various bits of the PowerMac platform code
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* at times where the real asynchronous & interrupt driven driver
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* cannot be used. The API borrows some semantics from the darwin
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* driver in order to ease the implementation of the platform
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* properties parser
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*/
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#undef DEBUG
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/adb.h>
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#include <linux/pmu.h>
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#include <asm/keylargo.h>
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#include <asm/uninorth.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/pmac_low_i2c.h>
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#define MAX_LOW_I2C_HOST 4
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#ifdef DEBUG
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#define DBG(x...) do {\
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printk(KERN_DEBUG "KW:" x); \
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} while(0)
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#else
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#define DBG(x...)
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#endif
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struct low_i2c_host;
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typedef int (*low_i2c_func_t)(struct low_i2c_host *host, u8 addr, u8 sub, u8 *data, int len);
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struct low_i2c_host
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{
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struct device_node *np; /* OF device node */
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struct semaphore mutex; /* Access mutex for use by i2c-keywest */
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low_i2c_func_t func; /* Access function */
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unsigned int is_open : 1; /* Poor man's access control */
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int mode; /* Current mode */
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int channel; /* Current channel */
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int num_channels; /* Number of channels */
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void __iomem *base; /* For keywest-i2c, base address */
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int bsteps; /* And register stepping */
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int speed; /* And speed */
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};
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static struct low_i2c_host low_i2c_hosts[MAX_LOW_I2C_HOST];
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/* No locking is necessary on allocation, we are running way before
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* anything can race with us
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*/
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static struct low_i2c_host *find_low_i2c_host(struct device_node *np)
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{
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int i;
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for (i = 0; i < MAX_LOW_I2C_HOST; i++)
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if (low_i2c_hosts[i].np == np)
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return &low_i2c_hosts[i];
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return NULL;
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}
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/*
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*
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* i2c-keywest implementation (UniNorth, U2, U3, Keylargo's)
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*
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*/
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/*
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* Keywest i2c definitions borrowed from drivers/i2c/i2c-keywest.h,
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* should be moved somewhere in include/asm-ppc/
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*/
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/* Register indices */
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typedef enum {
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reg_mode = 0,
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reg_control,
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reg_status,
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reg_isr,
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reg_ier,
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reg_addr,
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reg_subaddr,
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reg_data
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} reg_t;
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/* Mode register */
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#define KW_I2C_MODE_100KHZ 0x00
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#define KW_I2C_MODE_50KHZ 0x01
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#define KW_I2C_MODE_25KHZ 0x02
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#define KW_I2C_MODE_DUMB 0x00
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#define KW_I2C_MODE_STANDARD 0x04
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#define KW_I2C_MODE_STANDARDSUB 0x08
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#define KW_I2C_MODE_COMBINED 0x0C
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#define KW_I2C_MODE_MODE_MASK 0x0C
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#define KW_I2C_MODE_CHAN_MASK 0xF0
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/* Control register */
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#define KW_I2C_CTL_AAK 0x01
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#define KW_I2C_CTL_XADDR 0x02
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#define KW_I2C_CTL_STOP 0x04
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#define KW_I2C_CTL_START 0x08
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/* Status register */
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#define KW_I2C_STAT_BUSY 0x01
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#define KW_I2C_STAT_LAST_AAK 0x02
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#define KW_I2C_STAT_LAST_RW 0x04
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#define KW_I2C_STAT_SDA 0x08
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#define KW_I2C_STAT_SCL 0x10
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/* IER & ISR registers */
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#define KW_I2C_IRQ_DATA 0x01
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#define KW_I2C_IRQ_ADDR 0x02
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#define KW_I2C_IRQ_STOP 0x04
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#define KW_I2C_IRQ_START 0x08
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#define KW_I2C_IRQ_MASK 0x0F
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/* State machine states */
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enum {
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state_idle,
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state_addr,
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state_read,
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state_write,
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state_stop,
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state_dead
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};
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#define WRONG_STATE(name) do {\
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printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
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name, __kw_state_names[state], isr); \
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} while(0)
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static const char *__kw_state_names[] = {
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"state_idle",
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"state_addr",
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"state_read",
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"state_write",
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"state_stop",
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"state_dead"
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};
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static inline u8 __kw_read_reg(struct low_i2c_host *host, reg_t reg)
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{
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return readb(host->base + (((unsigned int)reg) << host->bsteps));
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}
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static inline void __kw_write_reg(struct low_i2c_host *host, reg_t reg, u8 val)
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{
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writeb(val, host->base + (((unsigned)reg) << host->bsteps));
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(void)__kw_read_reg(host, reg_subaddr);
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}
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#define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
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#define kw_read_reg(reg) __kw_read_reg(host, reg)
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/* Don't schedule, the g5 fan controller is too
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* timing sensitive
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*/
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static u8 kw_wait_interrupt(struct low_i2c_host* host)
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{
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int i, j;
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u8 isr;
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for (i = 0; i < 100000; i++) {
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isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
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if (isr != 0)
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return isr;
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/* This code is used with the timebase frozen, we cannot rely
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* on udelay ! For now, just use a bogus loop
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*/
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for (j = 1; j < 10000; j++)
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mb();
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}
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return isr;
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}
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static int kw_handle_interrupt(struct low_i2c_host *host, int state, int rw, int *rc, u8 **data, int *len, u8 isr)
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{
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u8 ack;
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DBG("kw_handle_interrupt(%s, isr: %x)\n", __kw_state_names[state], isr);
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if (isr == 0) {
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if (state != state_stop) {
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DBG("KW: Timeout !\n");
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*rc = -EIO;
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goto stop;
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}
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if (state == state_stop) {
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ack = kw_read_reg(reg_status);
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if (!(ack & KW_I2C_STAT_BUSY)) {
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state = state_idle;
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kw_write_reg(reg_ier, 0x00);
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}
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}
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return state;
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}
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if (isr & KW_I2C_IRQ_ADDR) {
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ack = kw_read_reg(reg_status);
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if (state != state_addr) {
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kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
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WRONG_STATE("KW_I2C_IRQ_ADDR");
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*rc = -EIO;
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goto stop;
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}
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if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
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*rc = -ENODEV;
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DBG("KW: NAK on address\n");
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return state_stop;
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} else {
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if (rw) {
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state = state_read;
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if (*len > 1)
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kw_write_reg(reg_control, KW_I2C_CTL_AAK);
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} else {
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state = state_write;
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kw_write_reg(reg_data, **data);
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(*data)++; (*len)--;
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}
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}
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kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
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}
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if (isr & KW_I2C_IRQ_DATA) {
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if (state == state_read) {
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**data = kw_read_reg(reg_data);
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(*data)++; (*len)--;
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kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
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if ((*len) == 0)
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state = state_stop;
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else if ((*len) == 1)
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kw_write_reg(reg_control, 0);
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} else if (state == state_write) {
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ack = kw_read_reg(reg_status);
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if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
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DBG("KW: nack on data write\n");
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*rc = -EIO;
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goto stop;
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} else if (*len) {
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kw_write_reg(reg_data, **data);
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(*data)++; (*len)--;
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} else {
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kw_write_reg(reg_control, KW_I2C_CTL_STOP);
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state = state_stop;
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*rc = 0;
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}
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kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
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} else {
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kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
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WRONG_STATE("KW_I2C_IRQ_DATA");
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if (state != state_stop) {
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*rc = -EIO;
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goto stop;
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}
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}
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}
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if (isr & KW_I2C_IRQ_STOP) {
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kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
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if (state != state_stop) {
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WRONG_STATE("KW_I2C_IRQ_STOP");
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*rc = -EIO;
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}
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return state_idle;
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}
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if (isr & KW_I2C_IRQ_START)
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kw_write_reg(reg_isr, KW_I2C_IRQ_START);
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return state;
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stop:
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kw_write_reg(reg_control, KW_I2C_CTL_STOP);
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return state_stop;
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}
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static int keywest_low_i2c_func(struct low_i2c_host *host, u8 addr, u8 subaddr, u8 *data, int len)
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{
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u8 mode_reg = host->speed;
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int state = state_addr;
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int rc = 0;
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/* Setup mode & subaddress if any */
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switch(host->mode) {
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case pmac_low_i2c_mode_dumb:
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printk(KERN_ERR "low_i2c: Dumb mode not supported !\n");
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return -EINVAL;
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case pmac_low_i2c_mode_std:
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mode_reg |= KW_I2C_MODE_STANDARD;
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break;
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case pmac_low_i2c_mode_stdsub:
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mode_reg |= KW_I2C_MODE_STANDARDSUB;
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break;
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case pmac_low_i2c_mode_combined:
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mode_reg |= KW_I2C_MODE_COMBINED;
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break;
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}
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/* Setup channel & clear pending irqs */
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kw_write_reg(reg_isr, kw_read_reg(reg_isr));
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kw_write_reg(reg_mode, mode_reg | (host->channel << 4));
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kw_write_reg(reg_status, 0);
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/* Set up address and r/w bit */
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kw_write_reg(reg_addr, addr);
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/* Set up the sub address */
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if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
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|| (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
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kw_write_reg(reg_subaddr, subaddr);
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/* Start sending address & disable interrupt*/
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kw_write_reg(reg_ier, 0 /*KW_I2C_IRQ_MASK*/);
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kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
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/* State machine, to turn into an interrupt handler */
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while(state != state_idle) {
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u8 isr = kw_wait_interrupt(host);
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state = kw_handle_interrupt(host, state, addr & 1, &rc, &data, &len, isr);
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}
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return rc;
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}
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static void keywest_low_i2c_add(struct device_node *np)
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{
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struct low_i2c_host *host = find_low_i2c_host(NULL);
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u32 *psteps, *prate, steps, aoffset = 0;
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struct device_node *parent;
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if (host == NULL) {
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printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
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np->full_name);
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return;
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}
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memset(host, 0, sizeof(*host));
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init_MUTEX(&host->mutex);
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host->np = of_node_get(np);
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psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
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steps = psteps ? (*psteps) : 0x10;
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for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
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steps >>= 1;
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parent = of_get_parent(np);
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host->num_channels = 1;
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if (parent && parent->name[0] == 'u') {
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host->num_channels = 2;
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aoffset = 3;
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}
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/* Select interface rate */
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host->speed = KW_I2C_MODE_100KHZ;
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prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
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if (prate) switch(*prate) {
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case 100:
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host->speed = KW_I2C_MODE_100KHZ;
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break;
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case 50:
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host->speed = KW_I2C_MODE_50KHZ;
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break;
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case 25:
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host->speed = KW_I2C_MODE_25KHZ;
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break;
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}
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host->mode = pmac_low_i2c_mode_std;
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host->base = ioremap(np->addrs[0].address + aoffset,
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np->addrs[0].size);
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host->func = keywest_low_i2c_func;
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}
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/*
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*
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* PMU implementation
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*
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*/
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#ifdef CONFIG_ADB_PMU
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static int pmu_low_i2c_func(struct low_i2c_host *host, u8 addr, u8 sub, u8 *data, int len)
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{
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// TODO
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return -ENODEV;
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}
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static void pmu_low_i2c_add(struct device_node *np)
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{
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struct low_i2c_host *host = find_low_i2c_host(NULL);
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if (host == NULL) {
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printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
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np->full_name);
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return;
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}
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memset(host, 0, sizeof(*host));
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init_MUTEX(&host->mutex);
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host->np = of_node_get(np);
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host->num_channels = 3;
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host->mode = pmac_low_i2c_mode_std;
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host->func = pmu_low_i2c_func;
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}
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#endif /* CONFIG_ADB_PMU */
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void __init pmac_init_low_i2c(void)
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{
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struct device_node *np;
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/* Probe keywest-i2c busses */
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np = of_find_compatible_node(NULL, "i2c", "keywest-i2c");
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while(np) {
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keywest_low_i2c_add(np);
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np = of_find_compatible_node(np, "i2c", "keywest-i2c");
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}
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#ifdef CONFIG_ADB_PMU
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/* Probe PMU busses */
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np = of_find_node_by_name(NULL, "via-pmu");
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if (np)
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pmu_low_i2c_add(np);
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#endif /* CONFIG_ADB_PMU */
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/* TODO: Add CUDA support as well */
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}
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int pmac_low_i2c_lock(struct device_node *np)
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{
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struct low_i2c_host *host = find_low_i2c_host(np);
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if (!host)
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return -ENODEV;
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down(&host->mutex);
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return 0;
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}
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EXPORT_SYMBOL(pmac_low_i2c_lock);
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int pmac_low_i2c_unlock(struct device_node *np)
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{
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struct low_i2c_host *host = find_low_i2c_host(np);
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if (!host)
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return -ENODEV;
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up(&host->mutex);
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return 0;
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}
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EXPORT_SYMBOL(pmac_low_i2c_unlock);
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int pmac_low_i2c_open(struct device_node *np, int channel)
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{
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struct low_i2c_host *host = find_low_i2c_host(np);
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if (!host)
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return -ENODEV;
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if (channel >= host->num_channels)
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return -EINVAL;
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down(&host->mutex);
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host->is_open = 1;
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host->channel = channel;
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return 0;
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}
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EXPORT_SYMBOL(pmac_low_i2c_open);
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int pmac_low_i2c_close(struct device_node *np)
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{
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struct low_i2c_host *host = find_low_i2c_host(np);
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if (!host)
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return -ENODEV;
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host->is_open = 0;
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up(&host->mutex);
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return 0;
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}
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EXPORT_SYMBOL(pmac_low_i2c_close);
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int pmac_low_i2c_setmode(struct device_node *np, int mode)
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{
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struct low_i2c_host *host = find_low_i2c_host(np);
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if (!host)
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return -ENODEV;
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|
WARN_ON(!host->is_open);
|
|
host->mode = mode;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(pmac_low_i2c_setmode);
|
|
|
|
int pmac_low_i2c_xfer(struct device_node *np, u8 addrdir, u8 subaddr, u8 *data, int len)
|
|
{
|
|
struct low_i2c_host *host = find_low_i2c_host(np);
|
|
|
|
if (!host)
|
|
return -ENODEV;
|
|
WARN_ON(!host->is_open);
|
|
|
|
return host->func(host, addrdir, subaddr, data, len);
|
|
}
|
|
EXPORT_SYMBOL(pmac_low_i2c_xfer);
|
|
|