1115 lines
28 KiB
C
1115 lines
28 KiB
C
/*
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* linux/arch/i386/traps.c
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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/*
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* 'Traps.c' handles hardware traps and faults after we have saved some
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* state in 'asm.s'.
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*/
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#include <linux/config.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/highmem.h>
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#include <linux/kallsyms.h>
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#include <linux/ptrace.h>
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#include <linux/utsname.h>
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#include <linux/kprobes.h>
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#include <linux/kexec.h>
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#ifdef CONFIG_EISA
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#include <linux/ioport.h>
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#include <linux/eisa.h>
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#endif
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#ifdef CONFIG_MCA
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#include <linux/mca.h>
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#endif
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/atomic.h>
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#include <asm/debugreg.h>
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#include <asm/desc.h>
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#include <asm/i387.h>
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#include <asm/nmi.h>
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#include <asm/smp.h>
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#include <asm/arch_hooks.h>
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#include <asm/kdebug.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include "mach_traps.h"
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asmlinkage int system_call(void);
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struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
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{ 0, 0 }, { 0, 0 } };
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/* Do we ignore FPU interrupts ? */
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char ignore_fpu_irq = 0;
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/*
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* The IDT has to be page-aligned to simplify the Pentium
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* F0 0F bug workaround.. We have a special link segment
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* for this.
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*/
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struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
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asmlinkage void divide_error(void);
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asmlinkage void debug(void);
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asmlinkage void nmi(void);
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asmlinkage void int3(void);
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asmlinkage void overflow(void);
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asmlinkage void bounds(void);
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asmlinkage void invalid_op(void);
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asmlinkage void device_not_available(void);
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asmlinkage void coprocessor_segment_overrun(void);
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asmlinkage void invalid_TSS(void);
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asmlinkage void segment_not_present(void);
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asmlinkage void stack_segment(void);
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asmlinkage void general_protection(void);
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asmlinkage void page_fault(void);
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asmlinkage void coprocessor_error(void);
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asmlinkage void simd_coprocessor_error(void);
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asmlinkage void alignment_check(void);
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asmlinkage void spurious_interrupt_bug(void);
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asmlinkage void machine_check(void);
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static int kstack_depth_to_print = 24;
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struct notifier_block *i386die_chain;
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static DEFINE_SPINLOCK(die_notifier_lock);
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int register_die_notifier(struct notifier_block *nb)
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{
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int err = 0;
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unsigned long flags;
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spin_lock_irqsave(&die_notifier_lock, flags);
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err = notifier_chain_register(&i386die_chain, nb);
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spin_unlock_irqrestore(&die_notifier_lock, flags);
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return err;
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}
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EXPORT_SYMBOL(register_die_notifier);
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static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
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{
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return p > (void *)tinfo &&
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p < (void *)tinfo + THREAD_SIZE - 3;
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}
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static inline unsigned long print_context_stack(struct thread_info *tinfo,
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unsigned long *stack, unsigned long ebp)
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{
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unsigned long addr;
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#ifdef CONFIG_FRAME_POINTER
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while (valid_stack_ptr(tinfo, (void *)ebp)) {
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addr = *(unsigned long *)(ebp + 4);
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printk(" [<%08lx>] ", addr);
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print_symbol("%s", addr);
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printk("\n");
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ebp = *(unsigned long *)ebp;
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}
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#else
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while (valid_stack_ptr(tinfo, stack)) {
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addr = *stack++;
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if (__kernel_text_address(addr)) {
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printk(" [<%08lx>]", addr);
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print_symbol(" %s", addr);
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printk("\n");
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}
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}
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#endif
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return ebp;
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}
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void show_trace(struct task_struct *task, unsigned long * stack)
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{
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unsigned long ebp;
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if (!task)
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task = current;
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if (task == current) {
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/* Grab ebp right from our regs */
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asm ("movl %%ebp, %0" : "=r" (ebp) : );
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} else {
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/* ebp is the last reg pushed by switch_to */
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ebp = *(unsigned long *) task->thread.esp;
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}
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while (1) {
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struct thread_info *context;
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context = (struct thread_info *)
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((unsigned long)stack & (~(THREAD_SIZE - 1)));
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ebp = print_context_stack(context, stack, ebp);
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stack = (unsigned long*)context->previous_esp;
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if (!stack)
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break;
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printk(" =======================\n");
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}
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}
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void show_stack(struct task_struct *task, unsigned long *esp)
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{
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unsigned long *stack;
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int i;
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if (esp == NULL) {
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if (task)
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esp = (unsigned long*)task->thread.esp;
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else
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esp = (unsigned long *)&esp;
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}
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stack = esp;
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for(i = 0; i < kstack_depth_to_print; i++) {
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if (kstack_end(stack))
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break;
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if (i && ((i % 8) == 0))
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printk("\n ");
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printk("%08lx ", *stack++);
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}
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printk("\nCall Trace:\n");
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show_trace(task, esp);
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}
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/*
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* The architecture-independent dump_stack generator
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*/
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void dump_stack(void)
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{
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unsigned long stack;
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show_trace(current, &stack);
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}
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EXPORT_SYMBOL(dump_stack);
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void show_registers(struct pt_regs *regs)
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{
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int i;
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int in_kernel = 1;
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unsigned long esp;
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unsigned short ss;
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esp = (unsigned long) (®s->esp);
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ss = __KERNEL_DS;
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if (user_mode(regs)) {
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in_kernel = 0;
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esp = regs->esp;
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ss = regs->xss & 0xffff;
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}
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print_modules();
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printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx"
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" (%s) \n",
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smp_processor_id(), 0xffff & regs->xcs, regs->eip,
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print_tainted(), regs->eflags, system_utsname.release);
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print_symbol("EIP is at %s\n", regs->eip);
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printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
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regs->eax, regs->ebx, regs->ecx, regs->edx);
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printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
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regs->esi, regs->edi, regs->ebp, esp);
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printk("ds: %04x es: %04x ss: %04x\n",
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regs->xds & 0xffff, regs->xes & 0xffff, ss);
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printk("Process %s (pid: %d, threadinfo=%p task=%p)",
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current->comm, current->pid, current_thread_info(), current);
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/*
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* When in-kernel, we also print out the stack and code at the
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* time of the fault..
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*/
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if (in_kernel) {
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u8 __user *eip;
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printk("\nStack: ");
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show_stack(NULL, (unsigned long*)esp);
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printk("Code: ");
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eip = (u8 __user *)regs->eip - 43;
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for (i = 0; i < 64; i++, eip++) {
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unsigned char c;
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if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) {
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printk(" Bad EIP value.");
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break;
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}
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if (eip == (u8 __user *)regs->eip)
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printk("<%02x> ", c);
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else
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printk("%02x ", c);
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}
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}
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printk("\n");
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}
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static void handle_BUG(struct pt_regs *regs)
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{
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unsigned short ud2;
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unsigned short line;
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char *file;
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char c;
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unsigned long eip;
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if (user_mode(regs))
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goto no_bug; /* Not in kernel */
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eip = regs->eip;
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if (eip < PAGE_OFFSET)
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goto no_bug;
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if (__get_user(ud2, (unsigned short __user *)eip))
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goto no_bug;
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if (ud2 != 0x0b0f)
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goto no_bug;
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if (__get_user(line, (unsigned short __user *)(eip + 2)))
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goto bug;
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if (__get_user(file, (char * __user *)(eip + 4)) ||
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(unsigned long)file < PAGE_OFFSET || __get_user(c, file))
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file = "<bad filename>";
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printk("------------[ cut here ]------------\n");
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printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
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no_bug:
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return;
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/* Here we know it was a BUG but file-n-line is unavailable */
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bug:
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printk("Kernel BUG\n");
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}
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/* This is gone through when something in the kernel
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* has done something bad and is about to be terminated.
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*/
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void die(const char * str, struct pt_regs * regs, long err)
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{
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static struct {
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spinlock_t lock;
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u32 lock_owner;
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int lock_owner_depth;
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} die = {
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.lock = SPIN_LOCK_UNLOCKED,
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.lock_owner = -1,
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.lock_owner_depth = 0
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};
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static int die_counter;
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if (die.lock_owner != raw_smp_processor_id()) {
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console_verbose();
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spin_lock_irq(&die.lock);
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die.lock_owner = smp_processor_id();
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die.lock_owner_depth = 0;
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bust_spinlocks(1);
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}
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if (++die.lock_owner_depth < 3) {
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int nl = 0;
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handle_BUG(regs);
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printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
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#ifdef CONFIG_PREEMPT
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printk("PREEMPT ");
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nl = 1;
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#endif
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#ifdef CONFIG_SMP
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printk("SMP ");
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nl = 1;
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#endif
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#ifdef CONFIG_DEBUG_PAGEALLOC
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printk("DEBUG_PAGEALLOC");
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nl = 1;
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#endif
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if (nl)
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printk("\n");
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notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
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show_registers(regs);
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} else
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printk(KERN_ERR "Recursive die() failure, output suppressed\n");
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bust_spinlocks(0);
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die.lock_owner = -1;
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spin_unlock_irq(&die.lock);
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if (kexec_should_crash(current))
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crash_kexec(regs);
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops) {
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printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
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ssleep(5);
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panic("Fatal exception");
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}
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do_exit(SIGSEGV);
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}
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static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
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{
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if (!user_mode_vm(regs))
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die(str, regs, err);
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}
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static void do_trap(int trapnr, int signr, char *str, int vm86,
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struct pt_regs * regs, long error_code, siginfo_t *info)
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{
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struct task_struct *tsk = current;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = trapnr;
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if (regs->eflags & VM_MASK) {
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if (vm86)
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goto vm86_trap;
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goto trap_signal;
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}
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if (!user_mode(regs))
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goto kernel_trap;
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trap_signal: {
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if (info)
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force_sig_info(signr, info, tsk);
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else
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force_sig(signr, tsk);
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return;
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}
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kernel_trap: {
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if (!fixup_exception(regs))
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die(str, regs, error_code);
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return;
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}
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vm86_trap: {
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int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
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if (ret) goto trap_signal;
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return;
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}
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}
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#define DO_ERROR(trapnr, signr, str, name) \
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fastcall void do_##name(struct pt_regs * regs, long error_code) \
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{ \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
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}
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#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
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fastcall void do_##name(struct pt_regs * regs, long error_code) \
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{ \
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siginfo_t info; \
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = (void __user *)siaddr; \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
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}
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|
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#define DO_VM86_ERROR(trapnr, signr, str, name) \
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fastcall void do_##name(struct pt_regs * regs, long error_code) \
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{ \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
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}
|
|
|
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#define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
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fastcall void do_##name(struct pt_regs * regs, long error_code) \
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{ \
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siginfo_t info; \
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = (void __user *)siaddr; \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
|
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do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
|
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}
|
|
|
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DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
|
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#ifndef CONFIG_KPROBES
|
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DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
|
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#endif
|
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DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
|
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DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
|
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DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
|
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DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
|
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DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
|
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DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
|
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DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
|
|
DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
|
|
DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
|
|
|
|
fastcall void do_general_protection(struct pt_regs * regs, long error_code)
|
|
{
|
|
int cpu = get_cpu();
|
|
struct tss_struct *tss = &per_cpu(init_tss, cpu);
|
|
struct thread_struct *thread = ¤t->thread;
|
|
|
|
/*
|
|
* Perform the lazy TSS's I/O bitmap copy. If the TSS has an
|
|
* invalid offset set (the LAZY one) and the faulting thread has
|
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* a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
|
|
* and we set the offset field correctly. Then we let the CPU to
|
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* restart the faulting instruction.
|
|
*/
|
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if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
|
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thread->io_bitmap_ptr) {
|
|
memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
|
|
thread->io_bitmap_max);
|
|
/*
|
|
* If the previously set map was extending to higher ports
|
|
* than the current one, pad extra space with 0xff (no access).
|
|
*/
|
|
if (thread->io_bitmap_max < tss->io_bitmap_max)
|
|
memset((char *) tss->io_bitmap +
|
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thread->io_bitmap_max, 0xff,
|
|
tss->io_bitmap_max - thread->io_bitmap_max);
|
|
tss->io_bitmap_max = thread->io_bitmap_max;
|
|
tss->io_bitmap_base = IO_BITMAP_OFFSET;
|
|
put_cpu();
|
|
return;
|
|
}
|
|
put_cpu();
|
|
|
|
current->thread.error_code = error_code;
|
|
current->thread.trap_no = 13;
|
|
|
|
if (regs->eflags & VM_MASK)
|
|
goto gp_in_vm86;
|
|
|
|
if (!user_mode(regs))
|
|
goto gp_in_kernel;
|
|
|
|
current->thread.error_code = error_code;
|
|
current->thread.trap_no = 13;
|
|
force_sig(SIGSEGV, current);
|
|
return;
|
|
|
|
gp_in_vm86:
|
|
local_irq_enable();
|
|
handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
|
|
return;
|
|
|
|
gp_in_kernel:
|
|
if (!fixup_exception(regs)) {
|
|
if (notify_die(DIE_GPF, "general protection fault", regs,
|
|
error_code, 13, SIGSEGV) == NOTIFY_STOP)
|
|
return;
|
|
die("general protection fault", regs, error_code);
|
|
}
|
|
}
|
|
|
|
static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
|
|
{
|
|
printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
|
|
printk("You probably have a hardware problem with your RAM chips\n");
|
|
|
|
/* Clear and disable the memory parity error line. */
|
|
clear_mem_error(reason);
|
|
}
|
|
|
|
static void io_check_error(unsigned char reason, struct pt_regs * regs)
|
|
{
|
|
unsigned long i;
|
|
|
|
printk("NMI: IOCK error (debug interrupt?)\n");
|
|
show_registers(regs);
|
|
|
|
/* Re-enable the IOCK line, wait for a few seconds */
|
|
reason = (reason & 0xf) | 8;
|
|
outb(reason, 0x61);
|
|
i = 2000;
|
|
while (--i) udelay(1000);
|
|
reason &= ~8;
|
|
outb(reason, 0x61);
|
|
}
|
|
|
|
static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
|
|
{
|
|
#ifdef CONFIG_MCA
|
|
/* Might actually be able to figure out what the guilty party
|
|
* is. */
|
|
if( MCA_bus ) {
|
|
mca_handle_nmi();
|
|
return;
|
|
}
|
|
#endif
|
|
printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
|
|
reason, smp_processor_id());
|
|
printk("Dazed and confused, but trying to continue\n");
|
|
printk("Do you have a strange power saving mode enabled?\n");
|
|
}
|
|
|
|
static DEFINE_SPINLOCK(nmi_print_lock);
|
|
|
|
void die_nmi (struct pt_regs *regs, const char *msg)
|
|
{
|
|
spin_lock(&nmi_print_lock);
|
|
/*
|
|
* We are in trouble anyway, lets at least try
|
|
* to get a message out.
|
|
*/
|
|
bust_spinlocks(1);
|
|
printk(msg);
|
|
printk(" on CPU%d, eip %08lx, registers:\n",
|
|
smp_processor_id(), regs->eip);
|
|
show_registers(regs);
|
|
printk("console shuts up ...\n");
|
|
console_silent();
|
|
spin_unlock(&nmi_print_lock);
|
|
bust_spinlocks(0);
|
|
|
|
/* If we are in kernel we are probably nested up pretty bad
|
|
* and might aswell get out now while we still can.
|
|
*/
|
|
if (!user_mode(regs)) {
|
|
current->thread.trap_no = 2;
|
|
crash_kexec(regs);
|
|
}
|
|
|
|
do_exit(SIGSEGV);
|
|
}
|
|
|
|
static void default_do_nmi(struct pt_regs * regs)
|
|
{
|
|
unsigned char reason = 0;
|
|
|
|
/* Only the BSP gets external NMIs from the system. */
|
|
if (!smp_processor_id())
|
|
reason = get_nmi_reason();
|
|
|
|
if (!(reason & 0xc0)) {
|
|
if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
|
|
== NOTIFY_STOP)
|
|
return;
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
/*
|
|
* Ok, so this is none of the documented NMI sources,
|
|
* so it must be the NMI watchdog.
|
|
*/
|
|
if (nmi_watchdog) {
|
|
nmi_watchdog_tick(regs);
|
|
return;
|
|
}
|
|
#endif
|
|
unknown_nmi_error(reason, regs);
|
|
return;
|
|
}
|
|
if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
|
|
return;
|
|
if (reason & 0x80)
|
|
mem_parity_error(reason, regs);
|
|
if (reason & 0x40)
|
|
io_check_error(reason, regs);
|
|
/*
|
|
* Reassert NMI in case it became active meanwhile
|
|
* as it's edge-triggered.
|
|
*/
|
|
reassert_nmi();
|
|
}
|
|
|
|
static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static nmi_callback_t nmi_callback = dummy_nmi_callback;
|
|
|
|
fastcall void do_nmi(struct pt_regs * regs, long error_code)
|
|
{
|
|
int cpu;
|
|
|
|
nmi_enter();
|
|
|
|
cpu = smp_processor_id();
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
if (!cpu_online(cpu)) {
|
|
nmi_exit();
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
++nmi_count(cpu);
|
|
|
|
if (!nmi_callback(regs, cpu))
|
|
default_do_nmi(regs);
|
|
|
|
nmi_exit();
|
|
}
|
|
|
|
void set_nmi_callback(nmi_callback_t callback)
|
|
{
|
|
nmi_callback = callback;
|
|
}
|
|
EXPORT_SYMBOL_GPL(set_nmi_callback);
|
|
|
|
void unset_nmi_callback(void)
|
|
{
|
|
nmi_callback = dummy_nmi_callback;
|
|
}
|
|
EXPORT_SYMBOL_GPL(unset_nmi_callback);
|
|
|
|
#ifdef CONFIG_KPROBES
|
|
fastcall void do_int3(struct pt_regs *regs, long error_code)
|
|
{
|
|
if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
|
|
== NOTIFY_STOP)
|
|
return;
|
|
/* This is an interrupt gate, because kprobes wants interrupts
|
|
disabled. Normal trap handlers don't. */
|
|
restore_interrupts(regs);
|
|
do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Our handling of the processor debug registers is non-trivial.
|
|
* We do not clear them on entry and exit from the kernel. Therefore
|
|
* it is possible to get a watchpoint trap here from inside the kernel.
|
|
* However, the code in ./ptrace.c has ensured that the user can
|
|
* only set watchpoints on userspace addresses. Therefore the in-kernel
|
|
* watchpoint trap can only occur in code which is reading/writing
|
|
* from user space. Such code must not hold kernel locks (since it
|
|
* can equally take a page fault), therefore it is safe to call
|
|
* force_sig_info even though that claims and releases locks.
|
|
*
|
|
* Code in ./signal.c ensures that the debug control register
|
|
* is restored before we deliver any signal, and therefore that
|
|
* user code runs with the correct debug control register even though
|
|
* we clear it here.
|
|
*
|
|
* Being careful here means that we don't have to be as careful in a
|
|
* lot of more complicated places (task switching can be a bit lazy
|
|
* about restoring all the debug state, and ptrace doesn't have to
|
|
* find every occurrence of the TF bit that could be saved away even
|
|
* by user code)
|
|
*/
|
|
fastcall void do_debug(struct pt_regs * regs, long error_code)
|
|
{
|
|
unsigned int condition;
|
|
struct task_struct *tsk = current;
|
|
|
|
get_debugreg(condition, 6);
|
|
|
|
if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
|
|
SIGTRAP) == NOTIFY_STOP)
|
|
return;
|
|
/* It's safe to allow irq's after DR6 has been saved */
|
|
if (regs->eflags & X86_EFLAGS_IF)
|
|
local_irq_enable();
|
|
|
|
/* Mask out spurious debug traps due to lazy DR7 setting */
|
|
if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
|
|
if (!tsk->thread.debugreg[7])
|
|
goto clear_dr7;
|
|
}
|
|
|
|
if (regs->eflags & VM_MASK)
|
|
goto debug_vm86;
|
|
|
|
/* Save debug status register where ptrace can see it */
|
|
tsk->thread.debugreg[6] = condition;
|
|
|
|
/*
|
|
* Single-stepping through TF: make sure we ignore any events in
|
|
* kernel space (but re-enable TF when returning to user mode).
|
|
*/
|
|
if (condition & DR_STEP) {
|
|
/*
|
|
* We already checked v86 mode above, so we can
|
|
* check for kernel mode by just checking the CPL
|
|
* of CS.
|
|
*/
|
|
if (!user_mode(regs))
|
|
goto clear_TF_reenable;
|
|
}
|
|
|
|
/* Ok, finally something we can handle */
|
|
send_sigtrap(tsk, regs, error_code);
|
|
|
|
/* Disable additional traps. They'll be re-enabled when
|
|
* the signal is delivered.
|
|
*/
|
|
clear_dr7:
|
|
set_debugreg(0, 7);
|
|
return;
|
|
|
|
debug_vm86:
|
|
handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
|
|
return;
|
|
|
|
clear_TF_reenable:
|
|
set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
|
|
regs->eflags &= ~TF_MASK;
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Note that we play around with the 'TS' bit in an attempt to get
|
|
* the correct behaviour even in the presence of the asynchronous
|
|
* IRQ13 behaviour
|
|
*/
|
|
void math_error(void __user *eip)
|
|
{
|
|
struct task_struct * task;
|
|
siginfo_t info;
|
|
unsigned short cwd, swd;
|
|
|
|
/*
|
|
* Save the info for the exception handler and clear the error.
|
|
*/
|
|
task = current;
|
|
save_init_fpu(task);
|
|
task->thread.trap_no = 16;
|
|
task->thread.error_code = 0;
|
|
info.si_signo = SIGFPE;
|
|
info.si_errno = 0;
|
|
info.si_code = __SI_FAULT;
|
|
info.si_addr = eip;
|
|
/*
|
|
* (~cwd & swd) will mask out exceptions that are not set to unmasked
|
|
* status. 0x3f is the exception bits in these regs, 0x200 is the
|
|
* C1 reg you need in case of a stack fault, 0x040 is the stack
|
|
* fault bit. We should only be taking one exception at a time,
|
|
* so if this combination doesn't produce any single exception,
|
|
* then we have a bad program that isn't syncronizing its FPU usage
|
|
* and it will suffer the consequences since we won't be able to
|
|
* fully reproduce the context of the exception
|
|
*/
|
|
cwd = get_fpu_cwd(task);
|
|
swd = get_fpu_swd(task);
|
|
switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
|
|
case 0x000:
|
|
default:
|
|
break;
|
|
case 0x001: /* Invalid Op */
|
|
case 0x041: /* Stack Fault */
|
|
case 0x241: /* Stack Fault | Direction */
|
|
info.si_code = FPE_FLTINV;
|
|
/* Should we clear the SF or let user space do it ???? */
|
|
break;
|
|
case 0x002: /* Denormalize */
|
|
case 0x010: /* Underflow */
|
|
info.si_code = FPE_FLTUND;
|
|
break;
|
|
case 0x004: /* Zero Divide */
|
|
info.si_code = FPE_FLTDIV;
|
|
break;
|
|
case 0x008: /* Overflow */
|
|
info.si_code = FPE_FLTOVF;
|
|
break;
|
|
case 0x020: /* Precision */
|
|
info.si_code = FPE_FLTRES;
|
|
break;
|
|
}
|
|
force_sig_info(SIGFPE, &info, task);
|
|
}
|
|
|
|
fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
|
|
{
|
|
ignore_fpu_irq = 1;
|
|
math_error((void __user *)regs->eip);
|
|
}
|
|
|
|
static void simd_math_error(void __user *eip)
|
|
{
|
|
struct task_struct * task;
|
|
siginfo_t info;
|
|
unsigned short mxcsr;
|
|
|
|
/*
|
|
* Save the info for the exception handler and clear the error.
|
|
*/
|
|
task = current;
|
|
save_init_fpu(task);
|
|
task->thread.trap_no = 19;
|
|
task->thread.error_code = 0;
|
|
info.si_signo = SIGFPE;
|
|
info.si_errno = 0;
|
|
info.si_code = __SI_FAULT;
|
|
info.si_addr = eip;
|
|
/*
|
|
* The SIMD FPU exceptions are handled a little differently, as there
|
|
* is only a single status/control register. Thus, to determine which
|
|
* unmasked exception was caught we must mask the exception mask bits
|
|
* at 0x1f80, and then use these to mask the exception bits at 0x3f.
|
|
*/
|
|
mxcsr = get_fpu_mxcsr(task);
|
|
switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
|
|
case 0x000:
|
|
default:
|
|
break;
|
|
case 0x001: /* Invalid Op */
|
|
info.si_code = FPE_FLTINV;
|
|
break;
|
|
case 0x002: /* Denormalize */
|
|
case 0x010: /* Underflow */
|
|
info.si_code = FPE_FLTUND;
|
|
break;
|
|
case 0x004: /* Zero Divide */
|
|
info.si_code = FPE_FLTDIV;
|
|
break;
|
|
case 0x008: /* Overflow */
|
|
info.si_code = FPE_FLTOVF;
|
|
break;
|
|
case 0x020: /* Precision */
|
|
info.si_code = FPE_FLTRES;
|
|
break;
|
|
}
|
|
force_sig_info(SIGFPE, &info, task);
|
|
}
|
|
|
|
fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
|
|
long error_code)
|
|
{
|
|
if (cpu_has_xmm) {
|
|
/* Handle SIMD FPU exceptions on PIII+ processors. */
|
|
ignore_fpu_irq = 1;
|
|
simd_math_error((void __user *)regs->eip);
|
|
} else {
|
|
/*
|
|
* Handle strange cache flush from user space exception
|
|
* in all other cases. This is undocumented behaviour.
|
|
*/
|
|
if (regs->eflags & VM_MASK) {
|
|
handle_vm86_fault((struct kernel_vm86_regs *)regs,
|
|
error_code);
|
|
return;
|
|
}
|
|
current->thread.trap_no = 19;
|
|
current->thread.error_code = error_code;
|
|
die_if_kernel("cache flush denied", regs, error_code);
|
|
force_sig(SIGSEGV, current);
|
|
}
|
|
}
|
|
|
|
fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
|
|
long error_code)
|
|
{
|
|
#if 0
|
|
/* No need to warn about this any longer. */
|
|
printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
|
|
#endif
|
|
}
|
|
|
|
fastcall void setup_x86_bogus_stack(unsigned char * stk)
|
|
{
|
|
unsigned long *switch16_ptr, *switch32_ptr;
|
|
struct pt_regs *regs;
|
|
unsigned long stack_top, stack_bot;
|
|
unsigned short iret_frame16_off;
|
|
int cpu = smp_processor_id();
|
|
/* reserve the space on 32bit stack for the magic switch16 pointer */
|
|
memmove(stk, stk + 8, sizeof(struct pt_regs));
|
|
switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
|
|
regs = (struct pt_regs *)stk;
|
|
/* now the switch32 on 16bit stack */
|
|
stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
|
|
stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
|
|
switch32_ptr = (unsigned long *)(stack_top - 8);
|
|
iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
|
|
/* copy iret frame on 16bit stack */
|
|
memcpy((void *)(stack_bot + iret_frame16_off), ®s->eip, 20);
|
|
/* fill in the switch pointers */
|
|
switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
|
|
switch16_ptr[1] = __ESPFIX_SS;
|
|
switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
|
|
8 - CPU_16BIT_STACK_SIZE;
|
|
switch32_ptr[1] = __KERNEL_DS;
|
|
}
|
|
|
|
fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
|
|
{
|
|
unsigned long *switch32_ptr;
|
|
unsigned char *stack16, *stack32;
|
|
unsigned long stack_top, stack_bot;
|
|
int len;
|
|
int cpu = smp_processor_id();
|
|
stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
|
|
stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
|
|
switch32_ptr = (unsigned long *)(stack_top - 8);
|
|
/* copy the data from 16bit stack to 32bit stack */
|
|
len = CPU_16BIT_STACK_SIZE - 8 - sp;
|
|
stack16 = (unsigned char *)(stack_bot + sp);
|
|
stack32 = (unsigned char *)
|
|
(switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
|
|
memcpy(stack32, stack16, len);
|
|
return stack32;
|
|
}
|
|
|
|
/*
|
|
* 'math_state_restore()' saves the current math information in the
|
|
* old math state array, and gets the new ones from the current task
|
|
*
|
|
* Careful.. There are problems with IBM-designed IRQ13 behaviour.
|
|
* Don't touch unless you *really* know how it works.
|
|
*
|
|
* Must be called with kernel preemption disabled (in this case,
|
|
* local interrupts are disabled at the call-site in entry.S).
|
|
*/
|
|
asmlinkage void math_state_restore(struct pt_regs regs)
|
|
{
|
|
struct thread_info *thread = current_thread_info();
|
|
struct task_struct *tsk = thread->task;
|
|
|
|
clts(); /* Allow maths ops (or we recurse) */
|
|
if (!tsk_used_math(tsk))
|
|
init_fpu(tsk);
|
|
restore_fpu(tsk);
|
|
thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
|
|
}
|
|
|
|
#ifndef CONFIG_MATH_EMULATION
|
|
|
|
asmlinkage void math_emulate(long arg)
|
|
{
|
|
printk("math-emulation not enabled and no coprocessor found.\n");
|
|
printk("killing %s.\n",current->comm);
|
|
force_sig(SIGFPE,current);
|
|
schedule();
|
|
}
|
|
|
|
#endif /* CONFIG_MATH_EMULATION */
|
|
|
|
#ifdef CONFIG_X86_F00F_BUG
|
|
void __init trap_init_f00f_bug(void)
|
|
{
|
|
__set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
|
|
|
|
/*
|
|
* Update the IDT descriptor and reload the IDT so that
|
|
* it uses the read-only mapped virtual address.
|
|
*/
|
|
idt_descr.address = fix_to_virt(FIX_F00F_IDT);
|
|
__asm__ __volatile__("lidt %0" : : "m" (idt_descr));
|
|
}
|
|
#endif
|
|
|
|
#define _set_gate(gate_addr,type,dpl,addr,seg) \
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|
do { \
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|
int __d0, __d1; \
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|
__asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
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|
"movw %4,%%dx\n\t" \
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|
"movl %%eax,%0\n\t" \
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|
"movl %%edx,%1" \
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|
:"=m" (*((long *) (gate_addr))), \
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|
"=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
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|
:"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
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|
"3" ((char *) (addr)),"2" ((seg) << 16)); \
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|
} while (0)
|
|
|
|
|
|
/*
|
|
* This needs to use 'idt_table' rather than 'idt', and
|
|
* thus use the _nonmapped_ version of the IDT, as the
|
|
* Pentium F0 0F bugfix can have resulted in the mapped
|
|
* IDT being write-protected.
|
|
*/
|
|
void set_intr_gate(unsigned int n, void *addr)
|
|
{
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|
_set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
|
|
}
|
|
|
|
/*
|
|
* This routine sets up an interrupt gate at directory privilege level 3.
|
|
*/
|
|
static inline void set_system_intr_gate(unsigned int n, void *addr)
|
|
{
|
|
_set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
|
|
}
|
|
|
|
static void __init set_trap_gate(unsigned int n, void *addr)
|
|
{
|
|
_set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
|
|
}
|
|
|
|
static void __init set_system_gate(unsigned int n, void *addr)
|
|
{
|
|
_set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
|
|
}
|
|
|
|
static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
|
|
{
|
|
_set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
|
|
}
|
|
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
#ifdef CONFIG_EISA
|
|
void __iomem *p = ioremap(0x0FFFD9, 4);
|
|
if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
|
|
EISA_bus = 1;
|
|
}
|
|
iounmap(p);
|
|
#endif
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
init_apic_mappings();
|
|
#endif
|
|
|
|
set_trap_gate(0,÷_error);
|
|
set_intr_gate(1,&debug);
|
|
set_intr_gate(2,&nmi);
|
|
set_system_intr_gate(3, &int3); /* int3-5 can be called from all */
|
|
set_system_gate(4,&overflow);
|
|
set_system_gate(5,&bounds);
|
|
set_trap_gate(6,&invalid_op);
|
|
set_trap_gate(7,&device_not_available);
|
|
set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
|
|
set_trap_gate(9,&coprocessor_segment_overrun);
|
|
set_trap_gate(10,&invalid_TSS);
|
|
set_trap_gate(11,&segment_not_present);
|
|
set_trap_gate(12,&stack_segment);
|
|
set_trap_gate(13,&general_protection);
|
|
set_intr_gate(14,&page_fault);
|
|
set_trap_gate(15,&spurious_interrupt_bug);
|
|
set_trap_gate(16,&coprocessor_error);
|
|
set_trap_gate(17,&alignment_check);
|
|
#ifdef CONFIG_X86_MCE
|
|
set_trap_gate(18,&machine_check);
|
|
#endif
|
|
set_trap_gate(19,&simd_coprocessor_error);
|
|
|
|
set_system_gate(SYSCALL_VECTOR,&system_call);
|
|
|
|
/*
|
|
* Should be a barrier for any external CPU state.
|
|
*/
|
|
cpu_init();
|
|
|
|
trap_init_hook();
|
|
}
|
|
|
|
static int __init kstack_setup(char *s)
|
|
{
|
|
kstack_depth_to_print = simple_strtoul(s, NULL, 0);
|
|
return 0;
|
|
}
|
|
__setup("kstack=", kstack_setup);
|