272 lines
7.7 KiB
C
272 lines
7.7 KiB
C
/*
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* CAAM control-plane driver backend
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* Controller-level driver, kernel property detection, initialization
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*
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* Copyright 2008-2011 Freescale Semiconductor, Inc.
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*/
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#include "compat.h"
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#include "regs.h"
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#include "intern.h"
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#include "jr.h"
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static int caam_remove(struct platform_device *pdev)
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{
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struct device *ctrldev;
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struct caam_drv_private *ctrlpriv;
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struct caam_drv_private_jr *jrpriv;
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struct caam_full __iomem *topregs;
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int ring, ret = 0;
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ctrldev = &pdev->dev;
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ctrlpriv = dev_get_drvdata(ctrldev);
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topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
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/* shut down JobRs */
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for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
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ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]);
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jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
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irq_dispose_mapping(jrpriv->irq);
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}
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/* Shut down debug views */
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#ifdef CONFIG_DEBUG_FS
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debugfs_remove_recursive(ctrlpriv->dfs_root);
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#endif
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/* Unmap controller region */
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iounmap(&topregs->ctrl);
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kfree(ctrlpriv->jrdev);
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kfree(ctrlpriv);
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return ret;
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}
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/* Probe routine for CAAM top (controller) level */
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static int caam_probe(struct platform_device *pdev)
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{
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int d, ring, rspec;
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struct device *dev;
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struct device_node *nprop, *np;
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struct caam_ctrl __iomem *ctrl;
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struct caam_full __iomem *topregs;
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struct caam_drv_private *ctrlpriv;
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struct caam_deco **deco;
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u32 deconum;
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#ifdef CONFIG_DEBUG_FS
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struct caam_perfmon *perfmon;
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#endif
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ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
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if (!ctrlpriv)
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return -ENOMEM;
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dev = &pdev->dev;
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dev_set_drvdata(dev, ctrlpriv);
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ctrlpriv->pdev = pdev;
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nprop = pdev->dev.of_node;
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/* Get configuration properties from device tree */
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/* First, get register page */
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ctrl = of_iomap(nprop, 0);
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if (ctrl == NULL) {
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dev_err(dev, "caam: of_iomap() failed\n");
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return -ENOMEM;
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}
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ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
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/* topregs used to derive pointers to CAAM sub-blocks only */
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topregs = (struct caam_full __iomem *)ctrl;
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/* Get the IRQ of the controller (for security violations only) */
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ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL);
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/*
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* Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
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* 36-bit pointers in master configuration register
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*/
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setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
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(sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
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if (sizeof(dma_addr_t) == sizeof(u64))
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dma_set_mask(dev, DMA_BIT_MASK(36));
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/* Find out how many DECOs are present */
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deconum = (rd_reg64(&topregs->ctrl.perfmon.cha_num) &
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CHA_NUM_DECONUM_MASK) >> CHA_NUM_DECONUM_SHIFT;
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ctrlpriv->deco = kmalloc(deconum * sizeof(struct caam_deco *),
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GFP_KERNEL);
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deco = (struct caam_deco __force **)&topregs->deco;
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for (d = 0; d < deconum; d++)
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ctrlpriv->deco[d] = deco[d];
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/*
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* Detect and enable JobRs
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* First, find out how many ring spec'ed, allocate references
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* for all, then go probe each one.
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*/
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rspec = 0;
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for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")
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rspec++;
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ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);
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if (ctrlpriv->jrdev == NULL) {
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iounmap(&topregs->ctrl);
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return -ENOMEM;
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}
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ring = 0;
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ctrlpriv->total_jobrs = 0;
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for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") {
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caam_jr_probe(pdev, np, ring);
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ctrlpriv->total_jobrs++;
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ring++;
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}
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/* Check to see if QI present. If so, enable */
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ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
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CTPR_QI_MASK);
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if (ctrlpriv->qi_present) {
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ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
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/* This is all that's required to physically enable QI */
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wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
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}
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/* If no QI and no rings specified, quit and go home */
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if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
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dev_err(dev, "no queues configured, terminating\n");
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caam_remove(pdev);
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return -ENOMEM;
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}
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/* NOTE: RTIC detection ought to go here, around Si time */
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/* Initialize queue allocator lock */
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spin_lock_init(&ctrlpriv->jr_alloc_lock);
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/* Report "alive" for developer to see */
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dev_info(dev, "device ID = 0x%016llx\n",
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rd_reg64(&topregs->ctrl.perfmon.caam_id));
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dev_info(dev, "job rings = %d, qi = %d\n",
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ctrlpriv->total_jobrs, ctrlpriv->qi_present);
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#ifdef CONFIG_DEBUG_FS
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/*
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* FIXME: needs better naming distinction, as some amalgamation of
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* "caam" and nprop->full_name. The OF name isn't distinctive,
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* but does separate instances
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*/
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perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
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ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
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ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
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/* Controller-level - performance monitor counters */
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ctrlpriv->ctl_rq_dequeued =
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debugfs_create_u64("rq_dequeued",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->req_dequeued);
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ctrlpriv->ctl_ob_enc_req =
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debugfs_create_u64("ob_rq_encrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ob_enc_req);
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ctrlpriv->ctl_ib_dec_req =
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debugfs_create_u64("ib_rq_decrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ib_dec_req);
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ctrlpriv->ctl_ob_enc_bytes =
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debugfs_create_u64("ob_bytes_encrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ob_enc_bytes);
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ctrlpriv->ctl_ob_prot_bytes =
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debugfs_create_u64("ob_bytes_protected",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ob_prot_bytes);
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ctrlpriv->ctl_ib_dec_bytes =
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debugfs_create_u64("ib_bytes_decrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ib_dec_bytes);
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ctrlpriv->ctl_ib_valid_bytes =
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debugfs_create_u64("ib_bytes_validated",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ib_valid_bytes);
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/* Controller level - global status values */
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ctrlpriv->ctl_faultaddr =
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debugfs_create_u64("fault_addr",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->faultaddr);
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ctrlpriv->ctl_faultdetail =
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debugfs_create_u32("fault_detail",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->faultdetail);
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ctrlpriv->ctl_faultstatus =
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debugfs_create_u32("fault_status",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->status);
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/* Internal covering keys (useful in non-secure mode only) */
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ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
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ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
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ctrlpriv->ctl_kek = debugfs_create_blob("kek",
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S_IRUSR |
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S_IRGRP | S_IROTH,
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ctrlpriv->ctl,
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&ctrlpriv->ctl_kek_wrap);
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ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
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ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
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ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
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S_IRUSR |
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S_IRGRP | S_IROTH,
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ctrlpriv->ctl,
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&ctrlpriv->ctl_tkek_wrap);
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ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
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ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
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ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
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S_IRUSR |
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S_IRGRP | S_IROTH,
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ctrlpriv->ctl,
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&ctrlpriv->ctl_tdsk_wrap);
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#endif
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return 0;
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}
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static struct of_device_id caam_match[] = {
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{
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.compatible = "fsl,sec-v4.0",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, caam_match);
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static struct platform_driver caam_driver = {
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.driver = {
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.name = "caam",
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.owner = THIS_MODULE,
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.of_match_table = caam_match,
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},
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.probe = caam_probe,
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.remove = __devexit_p(caam_remove),
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};
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static int __init caam_base_init(void)
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{
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return platform_driver_register(&caam_driver);
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}
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static void __exit caam_base_exit(void)
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{
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return platform_driver_unregister(&caam_driver);
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}
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module_init(caam_base_init);
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module_exit(caam_base_exit);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("FSL CAAM request backend");
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MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");
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