505 lines
14 KiB
C
505 lines
14 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ISCI_PHY_H_
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#define _ISCI_PHY_H_
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#include <scsi/sas.h>
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#include <scsi/libsas.h>
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#include "isci.h"
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#include "sas.h"
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/* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
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* before restarting the starting state machine. Technically, the old parallel
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* ATA specification required up to 30 seconds for a device to issue its
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* signature FIS as a result of a soft reset. Now we see that devices respond
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* generally within 15 seconds, but we'll use 25 for now.
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*/
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#define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
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/* This is the timeout for the SATA OOB/SN because the hardware does not
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* recognize a hot plug after OOB signal but before the SN signals. We need to
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* make sure after a hotplug timeout if we have not received the speed event
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* notification from the hardware that we restart the hardware OOB state
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* machine.
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*/
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#define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
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enum sci_phy_protocol {
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SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
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SCIC_SDS_PHY_PROTOCOL_SAS,
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SCIC_SDS_PHY_PROTOCOL_SATA,
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SCIC_SDS_MAX_PHY_PROTOCOLS
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};
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/**
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* isci_phy - hba local phy infrastructure
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* @sm:
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* @protocol: attached device protocol
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* @phy_index: physical index relative to the controller (0-3)
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* @bcn_received_while_port_unassigned: bcn to report after port association
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* @sata_timer: timeout SATA signature FIS arrival
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*/
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struct isci_phy {
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struct sci_base_state_machine sm;
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struct isci_port *owning_port;
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enum sas_linkrate max_negotiated_speed;
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enum sci_phy_protocol protocol;
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u8 phy_index;
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bool bcn_received_while_port_unassigned;
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bool is_in_link_training;
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struct sci_timer sata_timer;
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struct scu_transport_layer_registers __iomem *transport_layer_registers;
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struct scu_link_layer_registers __iomem *link_layer_registers;
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struct asd_sas_phy sas_phy;
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struct isci_port *isci_port;
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u8 sas_addr[SAS_ADDR_SIZE];
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union {
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struct sas_identify_frame iaf;
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struct dev_to_host_fis fis;
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} frame_rcvd;
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};
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static inline struct isci_phy *to_iphy(struct asd_sas_phy *sas_phy)
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{
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struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
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return iphy;
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}
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struct sci_phy_cap {
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union {
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struct {
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/*
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* The SAS specification indicates the start bit shall
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* always be set to
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* 1. This implementation will have the start bit set
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* to 0 if the PHY CAPABILITIES were either not
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* received or speed negotiation failed.
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*/
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u8 start:1;
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u8 tx_ssc_type:1;
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u8 res1:2;
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u8 req_logical_linkrate:4;
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u32 gen1_no_ssc:1;
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u32 gen1_ssc:1;
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u32 gen2_no_ssc:1;
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u32 gen2_ssc:1;
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u32 gen3_no_ssc:1;
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u32 gen3_ssc:1;
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u32 res2:17;
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u32 parity:1;
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};
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u32 all;
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};
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} __packed;
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/* this data structure reflects the link layer transmit identification reg */
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struct sci_phy_proto {
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union {
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struct {
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u16 _r_a:1;
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u16 smp_iport:1;
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u16 stp_iport:1;
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u16 ssp_iport:1;
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u16 _r_b:4;
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u16 _r_c:1;
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u16 smp_tport:1;
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u16 stp_tport:1;
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u16 ssp_tport:1;
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u16 _r_d:4;
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};
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u16 all;
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};
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} __packed;
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/**
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* struct sci_phy_properties - This structure defines the properties common to
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* all phys that can be retrieved.
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*
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*
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*/
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struct sci_phy_properties {
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/**
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* This field specifies the port that currently contains the
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* supplied phy. This field may be set to NULL
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* if the phy is not currently contained in a port.
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*/
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struct isci_port *iport;
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/**
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* This field specifies the link rate at which the phy is
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* currently operating.
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*/
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enum sas_linkrate negotiated_link_rate;
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/**
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* This field specifies the index of the phy in relation to other
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* phys within the controller. This index is zero relative.
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*/
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u8 index;
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};
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/**
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* struct sci_sas_phy_properties - This structure defines the properties,
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* specific to a SAS phy, that can be retrieved.
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*
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*
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*/
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struct sci_sas_phy_properties {
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/**
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* This field delineates the Identify Address Frame received
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* from the remote end point.
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*/
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struct sas_identify_frame rcvd_iaf;
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/**
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* This field delineates the Phy capabilities structure received
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* from the remote end point.
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*/
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struct sci_phy_cap rcvd_cap;
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};
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/**
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* struct sci_sata_phy_properties - This structure defines the properties,
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* specific to a SATA phy, that can be retrieved.
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*
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*
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*/
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struct sci_sata_phy_properties {
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/**
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* This field delineates the signature FIS received from the
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* attached target.
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*/
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struct dev_to_host_fis signature_fis;
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/**
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* This field specifies to the user if a port selector is connected
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* on the specified phy.
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*/
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bool is_port_selector_present;
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};
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/**
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* enum sci_phy_counter_id - This enumeration depicts the various pieces of
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* optional information that can be retrieved for a specific phy.
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*
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*
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*/
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enum sci_phy_counter_id {
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/**
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* This PHY information field tracks the number of frames received.
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*/
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SCIC_PHY_COUNTER_RECEIVED_FRAME,
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/**
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* This PHY information field tracks the number of frames transmitted.
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*/
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SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
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/**
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* This PHY information field tracks the number of DWORDs received.
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*/
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SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
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/**
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* This PHY information field tracks the number of DWORDs transmitted.
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*/
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SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
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/**
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* This PHY information field tracks the number of times DWORD
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* synchronization was lost.
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*/
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SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
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/**
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* This PHY information field tracks the number of received DWORDs with
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* running disparity errors.
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*/
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SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
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/**
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* This PHY information field tracks the number of received frames with a
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* CRC error (not including short or truncated frames).
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*/
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SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
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/**
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* This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
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* primitives received.
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*/
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SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
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/**
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* This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
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* primitives transmitted.
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*/
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SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
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/**
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* This PHY information field tracks the number of times the inactivity
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* timer for connections on the phy has been utilized.
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*/
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SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
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/**
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* This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
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* primitives received.
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*/
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SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
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/**
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* This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
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* primitives transmitted.
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*/
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SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
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/**
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* This PHY information field tracks the number of CREDIT BLOCKED
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* primitives received.
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* @note Depending on remote device implementation, credit blocks
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* may occur regularly.
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*/
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SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
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/**
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* This PHY information field contains the number of short frames
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* received. A short frame is simply a frame smaller then what is
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* allowed by either the SAS or SATA specification.
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*/
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SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
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/**
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* This PHY information field contains the number of frames received after
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* credit has been exhausted.
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*/
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SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
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/**
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* This PHY information field contains the number of frames received after
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* a DONE has been received.
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*/
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SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
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/**
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* This PHY information field contains the number of times the phy
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* failed to achieve DWORD synchronization during speed negotiation.
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*/
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SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
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};
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enum sci_phy_states {
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/**
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* Simply the initial state for the base domain state machine.
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*/
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SCI_PHY_INITIAL,
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/**
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* This state indicates that the phy has successfully been stopped.
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* In this state no new IO operations are permitted on this phy.
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* This state is entered from the INITIAL state.
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* This state is entered from the STARTING state.
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* This state is entered from the READY state.
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* This state is entered from the RESETTING state.
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*/
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SCI_PHY_STOPPED,
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/**
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* This state indicates that the phy is in the process of becomming
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* ready. In this state no new IO operations are permitted on this phy.
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* This state is entered from the STOPPED state.
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* This state is entered from the READY state.
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* This state is entered from the RESETTING state.
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*/
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SCI_PHY_STARTING,
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/**
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* Initial state
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*/
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SCI_PHY_SUB_INITIAL,
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/**
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* Wait state for the hardware OSSP event type notification
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*/
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SCI_PHY_SUB_AWAIT_OSSP_EN,
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/**
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* Wait state for the PHY speed notification
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*/
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SCI_PHY_SUB_AWAIT_SAS_SPEED_EN,
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/**
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* Wait state for the IAF Unsolicited frame notification
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*/
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SCI_PHY_SUB_AWAIT_IAF_UF,
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/**
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* Wait state for the request to consume power
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*/
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SCI_PHY_SUB_AWAIT_SAS_POWER,
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/**
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* Wait state for request to consume power
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*/
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SCI_PHY_SUB_AWAIT_SATA_POWER,
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/**
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* Wait state for the SATA PHY notification
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*/
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SCI_PHY_SUB_AWAIT_SATA_PHY_EN,
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/**
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* Wait for the SATA PHY speed notification
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*/
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SCI_PHY_SUB_AWAIT_SATA_SPEED_EN,
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/**
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* Wait state for the SIGNATURE FIS unsolicited frame notification
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*/
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SCI_PHY_SUB_AWAIT_SIG_FIS_UF,
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/**
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* Exit state for this state machine
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*/
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SCI_PHY_SUB_FINAL,
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/**
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* This state indicates the the phy is now ready. Thus, the user
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* is able to perform IO operations utilizing this phy as long as it
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* is currently part of a valid port.
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* This state is entered from the STARTING state.
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*/
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SCI_PHY_READY,
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/**
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* This state indicates that the phy is in the process of being reset.
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* In this state no new IO operations are permitted on this phy.
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* This state is entered from the READY state.
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*/
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SCI_PHY_RESETTING,
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/**
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* Simply the final state for the base phy state machine.
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*/
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SCI_PHY_FINAL,
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};
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void sci_phy_construct(
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struct isci_phy *iphy,
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struct isci_port *iport,
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u8 phy_index);
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struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy);
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void sci_phy_set_port(
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struct isci_phy *iphy,
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struct isci_port *iport);
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enum sci_status sci_phy_initialize(
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struct isci_phy *iphy,
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struct scu_transport_layer_registers __iomem *transport_layer_registers,
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struct scu_link_layer_registers __iomem *link_layer_registers);
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enum sci_status sci_phy_start(
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struct isci_phy *iphy);
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enum sci_status sci_phy_stop(
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struct isci_phy *iphy);
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enum sci_status sci_phy_reset(
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struct isci_phy *iphy);
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void sci_phy_resume(
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struct isci_phy *iphy);
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void sci_phy_setup_transport(
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struct isci_phy *iphy,
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u32 device_id);
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enum sci_status sci_phy_event_handler(
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struct isci_phy *iphy,
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u32 event_code);
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enum sci_status sci_phy_frame_handler(
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struct isci_phy *iphy,
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u32 frame_index);
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enum sci_status sci_phy_consume_power_handler(
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struct isci_phy *iphy);
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void sci_phy_get_sas_address(
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struct isci_phy *iphy,
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struct sci_sas_address *sas_address);
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void sci_phy_get_attached_sas_address(
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struct isci_phy *iphy,
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struct sci_sas_address *sas_address);
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struct sci_phy_proto;
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void sci_phy_get_protocols(
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struct isci_phy *iphy,
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struct sci_phy_proto *protocols);
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enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy);
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struct isci_host;
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void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
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int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
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#endif /* !defined(_ISCI_PHY_H_) */
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