Paul Mundt 55661fc1f1 sh: Assume new page cache pages have dirty dcache lines. ... This follows the ARM change c01778001a ("ARM: 6379/1: Assume new page cache pages have dirty D-cache") for the same rationale: There are places in Linux where writes to newly allocated page cache pages happen without a subsequent call to flush_dcache_page() (several PIO drivers including USB HCD). This patch changes the meaning of PG_arch_1 to be PG_dcache_clean and always flush the D-cache for a newly mapped page in update_mmu_cache(). This addresses issues seen with executing binaries from MMC, in addition to some of the other HCDs that don't explicitly do cache management for their pipe-in buffers. Requested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>		2010-12-01 15:39:51 +09:00
..
Kconfig	sh: nommu: use 32-bit phys mode.	2010-11-04 12:32:24 +09:00
Makefile	…
alignment.c	…
asids-debugfs.c	…
cache-debugfs.c	…
cache-sh2.c	…
cache-sh2a.c	…
cache-sh3.c	…
cache-sh4.c	sh: Assume new page cache pages have dirty dcache lines.	2010-12-01 15:39:51 +09:00
cache-sh5.c	…
cache-sh7705.c	sh: Assume new page cache pages have dirty dcache lines.	2010-12-01 15:39:51 +09:00
cache-shx3.c	…
cache.c	sh: Assume new page cache pages have dirty dcache lines.	2010-12-01 15:39:51 +09:00
consistent.c	sh: nommu: use 32-bit phys mode.	2010-11-04 12:32:24 +09:00
extable_32.c	…
extable_64.c	…
fault_32.c	…
fault_64.c	…
flush-sh4.c	…
gup.c	…
hugetlbpage.c	…
init.c	…
ioremap.c	…
ioremap_fixed.c	…
kmap.c	sh: Assume new page cache pages have dirty dcache lines.	2010-12-01 15:39:51 +09:00
mmap.c	…
nommu.c	…
numa.c	…
pgtable.c	…
pmb.c	…
sram.c	…
tlb-debugfs.c	…
tlb-pteaex.c	…
tlb-sh3.c	…
tlb-sh4.c	…
tlb-sh5.c	…
tlb-urb.c	…
tlbflush_32.c	…
tlbflush_64.c	…
uncached.c	sh: nommu: use 32-bit phys mode.	2010-11-04 12:32:24 +09:00