ea31a6b203
On many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates that the L2 cache is disabled and therefore Linux should not attempt to use it. [Ralf: Moved the code added by Kevin's original patch into a separate function that can easily be replaced for platforms that need more a different probe.] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org> Cc: <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/1723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
Makefile | ||
c-octeon.c | ||
c-r3k.c | ||
c-r4k.c | ||
c-tx39.c | ||
cache.c | ||
cerr-sb1.c | ||
cex-gen.S | ||
cex-oct.S | ||
cex-sb1.S | ||
dma-default.c | ||
extable.c | ||
fault.c | ||
highmem.c | ||
hugetlbpage.c | ||
init.c | ||
ioremap.c | ||
page.c | ||
pgtable-32.c | ||
pgtable-64.c | ||
sc-ip22.c | ||
sc-mips.c | ||
sc-r5k.c | ||
sc-rm7k.c | ||
tlb-r3k.c | ||
tlb-r4k.c | ||
tlb-r8k.c | ||
tlbex-fault.S | ||
tlbex.c | ||
uasm.c |