7132ab7f6e
The TSEC/eTSEC can detect the interface to the PHY automatically, but it isn't able to detect whether the RGMII connection needs internal delay. So we need to detect that change in the device tree, propagate it to the platform data, and then check it if we're in RGMII. This fixes a bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay for RGMII. Signed-off-by: Andy Fleming <afleming@freescale.com> |
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.. | ||
qe_lib | ||
Makefile | ||
commproc.c | ||
cpm2_common.c | ||
cpm2_pic.c | ||
cpm2_pic.h | ||
dart.h | ||
dart_iommu.c | ||
dcr-low.S | ||
dcr.c | ||
fsl_pcie.h | ||
fsl_soc.c | ||
fsl_soc.h | ||
grackle.c | ||
i8259.c | ||
indirect_pci.c | ||
ipic.c | ||
ipic.h | ||
micropatch.c | ||
mmio_nvram.c | ||
mpc8xx_pic.c | ||
mpc8xx_pic.h | ||
mpic.c | ||
mpic.h | ||
mpic_msi.c | ||
mpic_u3msi.c | ||
mv64x60.h | ||
mv64x60_dev.c | ||
mv64x60_pci.c | ||
mv64x60_pic.c | ||
pmi.c | ||
rtc_cmos_setup.c | ||
timer.c | ||
tsi108_dev.c | ||
tsi108_pci.c | ||
uic.c |