102 lines
3.3 KiB
C
102 lines
3.3 KiB
C
/*
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* Copyright 2000-2003, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <asm/reboot.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <prom.h>
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static void xxs1500_reset(char *c)
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{
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/* Jump to the reset vector */
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__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
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}
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static void xxs1500_power_off(void)
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{
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while (1)
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asm volatile (
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" .set mips32 \n"
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" wait \n"
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" .set mips0 \n");
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}
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void __init board_setup(void)
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{
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u32 pin_func;
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pm_power_off = xxs1500_power_off;
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_machine_halt = xxs1500_power_off;
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_machine_restart = xxs1500_reset;
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alchemy_gpio1_input_enable();
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alchemy_gpio2_enable();
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/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
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pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
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pin_func |= SYS_PF_UR3;
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au_writel(pin_func, SYS_PINFUNC);
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/* Enable UART */
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alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
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/* Enable DTR (MCR bit 0) = USB power up */
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__raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
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wmb();
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#ifdef CONFIG_PCI
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#if defined(__MIPSEB__)
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au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
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#else
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au_writel(0xf, Au1500_PCI_CFG);
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#endif
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#endif
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}
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static int __init xxs1500_init_irq(void)
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{
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irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
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irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW);
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irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */
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irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW);
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return 0;
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}
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arch_initcall(xxs1500_init_irq);
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