49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
#ifndef __PCR_H
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#define __PCR_H
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struct pcr_ops {
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u64 (*read)(void);
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void (*write)(u64);
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};
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extern const struct pcr_ops *pcr_ops;
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extern void deferred_pcr_work_irq(int irq, struct pt_regs *regs);
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extern void schedule_deferred_pcr_work(void);
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#define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
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#define PCR_STRACE 0x00000002 /* Trace supervisor events */
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#define PCR_UTRACE 0x00000004 /* Trace user events */
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#define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
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#define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
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#define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
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#define PCR_N2_MASK0 0x00003fc0
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#define PCR_N2_MASK0_SHIFT 6
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#define PCR_N2_SL0 0x0003c000
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#define PCR_N2_SL0_SHIFT 14
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#define PCR_N2_OV0 0x00040000
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#define PCR_N2_MASK1 0x07f80000
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#define PCR_N2_MASK1_SHIFT 19
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#define PCR_N2_SL1 0x78000000
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#define PCR_N2_SL1_SHIFT 27
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#define PCR_N2_OV1 0x80000000
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extern unsigned int picl_shift;
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/* In order to commonize as much of the implementation as
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* possible, we use PICH as our counter. Mostly this is
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* to accommodate Niagara-1 which can only count insn cycles
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* in PICH.
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*/
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static inline u64 picl_value(unsigned int nmi_hz)
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{
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u32 delta = local_cpu_data().clock_tick / (nmi_hz << picl_shift);
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return ((u64)((0 - delta) & 0xffffffff)) << 32;
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}
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extern u64 pcr_enable;
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extern int pcr_arch_init(void);
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#endif /* __PCR_H */
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