c5f04b8d10
- the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King <gking@nvidia.com> |
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| .. | ||
| barriers.h | ||
| clk.h | ||
| clkdev.h | ||
| debug-macro.S | ||
| entry-macro.S | ||
| gpio.h | ||
| hardware.h | ||
| io.h | ||
| iomap.h | ||
| irqs.h | ||
| legacy_irq.h | ||
| memory.h | ||
| pinmux-t2.h | ||
| pinmux.h | ||
| smp.h | ||
| system.h | ||
| timex.h | ||
| uncompress.h | ||
| vmalloc.h | ||