1022 lines
31 KiB
C
1022 lines
31 KiB
C
/*
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* Copyright (c) by Jaroslav Kysela <perex@suse.cz>
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* Creative Labs, Inc.
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* Routines for control of EMU10K1 chips
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*
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* Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
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* Added support for Audigy 2 Value.
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*
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*
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* BUGS:
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* --
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*
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* TODO:
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* --
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <sound/driver.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <sound/core.h>
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#include <sound/emu10k1.h>
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#include "p16v.h"
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#if 0
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MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
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MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
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MODULE_LICENSE("GPL");
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#endif
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/*************************************************************************
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* EMU10K1 init / done
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*************************************************************************/
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void snd_emu10k1_voice_init(emu10k1_t * emu, int ch)
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{
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snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
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snd_emu10k1_ptr_write(emu, IP, ch, 0);
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snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
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snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
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snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
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snd_emu10k1_ptr_write(emu, CPF, ch, 0);
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snd_emu10k1_ptr_write(emu, CCR, ch, 0);
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snd_emu10k1_ptr_write(emu, PSST, ch, 0);
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snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
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snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
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snd_emu10k1_ptr_write(emu, Z1, ch, 0);
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snd_emu10k1_ptr_write(emu, Z2, ch, 0);
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snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
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snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
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snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
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snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
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snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
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snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
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snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
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snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
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snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
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/*** these are last so OFF prevents writing ***/
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snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
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snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
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snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
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snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
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snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
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/* Audigy extra stuffs */
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if (emu->audigy) {
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snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
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snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
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snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
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}
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}
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static int __devinit snd_emu10k1_init(emu10k1_t * emu, int enable_ir)
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{
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int ch, idx, err;
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unsigned int silent_page;
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emu->fx8010.itram_size = (16 * 1024)/2;
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emu->fx8010.etram_pages.area = NULL;
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emu->fx8010.etram_pages.bytes = 0;
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/* disable audio and lock cache */
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outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
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/* reset recording buffers */
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snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
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snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
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snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
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/* disable channel interrupt */
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outl(0, emu->port + INTE);
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snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
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snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
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if (emu->audigy){
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/* set SPDIF bypass mode */
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snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
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/* enable rear left + rear right AC97 slots */
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snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | AC97SLOT_REAR_LEFT);
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}
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/* init envelope engine */
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for (ch = 0; ch < NUM_G; ch++) {
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emu->voices[ch].emu = emu;
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emu->voices[ch].number = ch;
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snd_emu10k1_voice_init(emu, ch);
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}
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/*
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* Init to 0x02109204 :
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* Clock accuracy = 0 (1000ppm)
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* Sample Rate = 2 (48kHz)
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* Audio Channel = 1 (Left of 2)
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* Source Number = 0 (Unspecified)
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* Generation Status = 1 (Original for Cat Code 12)
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* Cat Code = 12 (Digital Signal Mixer)
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* Mode = 0 (Mode 0)
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* Emphasis = 0 (None)
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* CP = 1 (Copyright unasserted)
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* AN = 0 (Audio data)
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* P = 0 (Consumer)
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*/
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snd_emu10k1_ptr_write(emu, SPCS0, 0,
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emu->spdif_bits[0] =
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SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
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SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
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SPCS_GENERATIONSTATUS | 0x00001200 |
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0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
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snd_emu10k1_ptr_write(emu, SPCS1, 0,
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emu->spdif_bits[1] =
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SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
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SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
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SPCS_GENERATIONSTATUS | 0x00001200 |
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0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
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snd_emu10k1_ptr_write(emu, SPCS2, 0,
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emu->spdif_bits[2] =
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SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
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SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
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SPCS_GENERATIONSTATUS | 0x00001200 |
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0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
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if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
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/* Hacks for Alice3 to work independent of haP16V driver */
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u32 tmp;
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//Setup SRCMulti_I2S SamplingRate
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tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
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tmp &= 0xfffff1ff;
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tmp |= (0x2<<9);
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snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
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/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
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snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
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/* Setup SRCMulti Input Audio Enable */
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/* Use 0xFFFFFFFF to enable P16V sounds. */
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snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
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/* Enabled Phased (8-channel) P16V playback */
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outl(0x0201, emu->port + HCFG2);
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/* Set playback routing. */
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snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
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}
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if (emu->audigy && (emu->serial == 0x10011102) ) { /* audigy2 Value */
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/* Hacks for Alice3 to work independent of haP16V driver */
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u32 tmp;
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snd_printk(KERN_ERR "Audigy2 value:Special config.\n");
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//Setup SRCMulti_I2S SamplingRate
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tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
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tmp &= 0xfffff1ff;
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tmp |= (0x2<<9);
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snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
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/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
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outl(0x600000, emu->port + 0x20);
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outl(0x14, emu->port + 0x24);
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/* Setup SRCMulti Input Audio Enable */
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outl(0x7b0000, emu->port + 0x20);
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outl(0xFF000000, emu->port + 0x24);
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/* Setup SPDIF Out Audio Enable */
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/* The Audigy 2 Value has a separate SPDIF out,
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* so no need for a mixer switch
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*/
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outl(0x7a0000, emu->port + 0x20);
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outl(0xFF000000, emu->port + 0x24);
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tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
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outl(tmp, emu->port + A_IOCFG);
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}
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/*
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* Clear page with silence & setup all pointers to this page
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*/
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memset(emu->silent_page.area, 0, PAGE_SIZE);
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silent_page = emu->silent_page.addr << 1;
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for (idx = 0; idx < MAXPAGES; idx++)
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((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
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snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
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snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
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snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
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silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
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for (ch = 0; ch < NUM_G; ch++) {
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snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
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snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
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}
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/*
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* Hokay, setup HCFG
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* Mute Disable Audio = 0
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* Lock Tank Memory = 1
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* Lock Sound Memory = 0
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* Auto Mute = 1
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*/
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if (emu->audigy) {
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if (emu->revision == 4) /* audigy2 */
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outl(HCFG_AUDIOENABLE |
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HCFG_AC3ENABLE_CDSPDIF |
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HCFG_AC3ENABLE_GPSPDIF |
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HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
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else
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outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
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} else if (emu->model == 0x20 ||
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emu->model == 0xc400 ||
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(emu->model == 0x21 && emu->revision < 6))
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outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
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else
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// With on-chip joystick
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outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
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if (enable_ir) { /* enable IR for SB Live */
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if (emu->audigy) {
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unsigned int reg = inl(emu->port + A_IOCFG);
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outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
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udelay(500);
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outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
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udelay(100);
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outl(reg, emu->port + A_IOCFG);
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} else {
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unsigned int reg = inl(emu->port + HCFG);
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outl(reg | HCFG_GPOUT2, emu->port + HCFG);
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udelay(500);
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outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
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udelay(100);
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outl(reg, emu->port + HCFG);
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}
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}
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if (emu->audigy) { /* enable analog output */
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unsigned int reg = inl(emu->port + A_IOCFG);
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outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
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}
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/*
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* Initialize the effect engine
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*/
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if ((err = snd_emu10k1_init_efx(emu)) < 0)
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return err;
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/*
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* Enable the audio bit
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*/
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outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
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/* Enable analog/digital outs on audigy */
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if (emu->audigy) {
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outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
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if (emu->revision == 4) { /* audigy2 */
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/* Unmute Analog now. Set GPO6 to 1 for Apollo.
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* This has to be done after init ALice3 I2SOut beyond 48KHz.
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* So, sequence is important. */
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outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
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} else if (emu->serial == 0x10011102) { /* audigy2 value */
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/* Unmute Analog now. */
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outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
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} else {
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/* Disable routing from AC97 line out to Front speakers */
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outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
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}
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}
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#if 0
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{
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unsigned int tmp;
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/* FIXME: the following routine disables LiveDrive-II !! */
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// TOSLink detection
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emu->tos_link = 0;
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tmp = inl(emu->port + HCFG);
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if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
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outl(tmp|0x800, emu->port + HCFG);
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udelay(50);
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if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
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emu->tos_link = 1;
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outl(tmp, emu->port + HCFG);
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}
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}
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}
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#endif
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snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
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emu->reserved_page = (emu10k1_memblk_t *)snd_emu10k1_synth_alloc(emu, 4096);
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if (emu->reserved_page)
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emu->reserved_page->map_locked = 1;
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return 0;
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}
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static int snd_emu10k1_done(emu10k1_t * emu)
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{
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int ch;
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outl(0, emu->port + INTE);
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/*
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* Shutdown the chip
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*/
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for (ch = 0; ch < NUM_G; ch++)
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snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
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for (ch = 0; ch < NUM_G; ch++) {
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snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
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snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
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snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
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snd_emu10k1_ptr_write(emu, CPF, ch, 0);
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}
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/* reset recording buffers */
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snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
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snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
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snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
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snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
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snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
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snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
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snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
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snd_emu10k1_ptr_write(emu, TCB, 0, 0);
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if (emu->audigy)
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snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
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else
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snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
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/* disable channel interrupt */
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snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
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snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
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/* remove reserved page */
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if (emu->reserved_page != NULL) {
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snd_emu10k1_synth_free(emu, (snd_util_memblk_t *)emu->reserved_page);
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emu->reserved_page = NULL;
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}
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/* disable audio and lock cache */
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outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
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snd_emu10k1_ptr_write(emu, PTB, 0, 0);
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snd_emu10k1_free_efx(emu);
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return 0;
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}
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/*************************************************************************
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* ECARD functional implementation
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*************************************************************************/
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/* In A1 Silicon, these bits are in the HC register */
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#define HOOKN_BIT (1L << 12)
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#define HANDN_BIT (1L << 11)
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#define PULSEN_BIT (1L << 10)
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#define EC_GDI1 (1 << 13)
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#define EC_GDI0 (1 << 14)
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#define EC_NUM_CONTROL_BITS 20
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#define EC_AC3_DATA_SELN 0x0001L
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#define EC_EE_DATA_SEL 0x0002L
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#define EC_EE_CNTRL_SELN 0x0004L
|
|
#define EC_EECLK 0x0008L
|
|
#define EC_EECS 0x0010L
|
|
#define EC_EESDO 0x0020L
|
|
#define EC_TRIM_CSN 0x0040L
|
|
#define EC_TRIM_SCLK 0x0080L
|
|
#define EC_TRIM_SDATA 0x0100L
|
|
#define EC_TRIM_MUTEN 0x0200L
|
|
#define EC_ADCCAL 0x0400L
|
|
#define EC_ADCRSTN 0x0800L
|
|
#define EC_DACCAL 0x1000L
|
|
#define EC_DACMUTEN 0x2000L
|
|
#define EC_LEDN 0x4000L
|
|
|
|
#define EC_SPDIF0_SEL_SHIFT 15
|
|
#define EC_SPDIF1_SEL_SHIFT 17
|
|
#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
|
|
#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
|
|
#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
|
|
#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
|
|
#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
|
|
* be incremented any time the EEPROM's
|
|
* format is changed. */
|
|
|
|
#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
|
|
|
|
/* Addresses for special values stored in to EEPROM */
|
|
#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
|
|
#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
|
|
#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
|
|
|
|
#define EC_LAST_PROMFILE_ADDR 0x2f
|
|
|
|
#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
|
|
* can be up to 30 characters in length
|
|
* and is stored as a NULL-terminated
|
|
* ASCII string. Any unused bytes must be
|
|
* filled with zeros */
|
|
#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
|
|
|
|
|
|
/* Most of this stuff is pretty self-evident. According to the hardware
|
|
* dudes, we need to leave the ADCCAL bit low in order to avoid a DC
|
|
* offset problem. Weird.
|
|
*/
|
|
#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
|
|
EC_TRIM_CSN)
|
|
|
|
|
|
#define EC_DEFAULT_ADC_GAIN 0xC4C4
|
|
#define EC_DEFAULT_SPDIF0_SEL 0x0
|
|
#define EC_DEFAULT_SPDIF1_SEL 0x4
|
|
|
|
/**************************************************************************
|
|
* @func Clock bits into the Ecard's control latch. The Ecard uses a
|
|
* control latch will is loaded bit-serially by toggling the Modem control
|
|
* lines from function 2 on the E8010. This function hides these details
|
|
* and presents the illusion that we are actually writing to a distinct
|
|
* register.
|
|
*/
|
|
|
|
static void snd_emu10k1_ecard_write(emu10k1_t * emu, unsigned int value)
|
|
{
|
|
unsigned short count;
|
|
unsigned int data;
|
|
unsigned long hc_port;
|
|
unsigned int hc_value;
|
|
|
|
hc_port = emu->port + HCFG;
|
|
hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
|
|
outl(hc_value, hc_port);
|
|
|
|
for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
|
|
|
|
/* Set up the value */
|
|
data = ((value & 0x1) ? PULSEN_BIT : 0);
|
|
value >>= 1;
|
|
|
|
outl(hc_value | data, hc_port);
|
|
|
|
/* Clock the shift register */
|
|
outl(hc_value | data | HANDN_BIT, hc_port);
|
|
outl(hc_value | data, hc_port);
|
|
}
|
|
|
|
/* Latch the bits */
|
|
outl(hc_value | HOOKN_BIT, hc_port);
|
|
outl(hc_value, hc_port);
|
|
}
|
|
|
|
/**************************************************************************
|
|
* @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
|
|
* trim value consists of a 16bit value which is composed of two
|
|
* 8 bit gain/trim values, one for the left channel and one for the
|
|
* right channel. The following table maps from the Gain/Attenuation
|
|
* value in decibels into the corresponding bit pattern for a single
|
|
* channel.
|
|
*/
|
|
|
|
static void snd_emu10k1_ecard_setadcgain(emu10k1_t * emu,
|
|
unsigned short gain)
|
|
{
|
|
unsigned int bit;
|
|
|
|
/* Enable writing to the TRIM registers */
|
|
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
|
|
|
|
/* Do it again to insure that we meet hold time requirements */
|
|
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
|
|
|
|
for (bit = (1 << 15); bit; bit >>= 1) {
|
|
unsigned int value;
|
|
|
|
value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
|
|
|
|
if (gain & bit)
|
|
value |= EC_TRIM_SDATA;
|
|
|
|
/* Clock the bit */
|
|
snd_emu10k1_ecard_write(emu, value);
|
|
snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
|
|
snd_emu10k1_ecard_write(emu, value);
|
|
}
|
|
|
|
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
|
|
}
|
|
|
|
static int __devinit snd_emu10k1_ecard_init(emu10k1_t * emu)
|
|
{
|
|
unsigned int hc_value;
|
|
|
|
/* Set up the initial settings */
|
|
emu->ecard_ctrl = EC_RAW_RUN_MODE |
|
|
EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
|
|
EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
|
|
|
|
/* Step 0: Set the codec type in the hardware control register
|
|
* and enable audio output */
|
|
hc_value = inl(emu->port + HCFG);
|
|
outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
|
|
inl(emu->port + HCFG);
|
|
|
|
/* Step 1: Turn off the led and deassert TRIM_CS */
|
|
snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
|
|
|
|
/* Step 2: Calibrate the ADC and DAC */
|
|
snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
|
|
|
|
/* Step 3: Wait for awhile; XXX We can't get away with this
|
|
* under a real operating system; we'll need to block and wait that
|
|
* way. */
|
|
snd_emu10k1_wait(emu, 48000);
|
|
|
|
/* Step 4: Switch off the DAC and ADC calibration. Note
|
|
* That ADC_CAL is actually an inverted signal, so we assert
|
|
* it here to stop calibration. */
|
|
snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
|
|
|
|
/* Step 4: Switch into run mode */
|
|
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
|
|
|
|
/* Step 5: Set the analog input gain */
|
|
snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Create the EMU10K1 instance
|
|
*/
|
|
|
|
static int snd_emu10k1_free(emu10k1_t *emu)
|
|
{
|
|
if (emu->port) { /* avoid access to already used hardware */
|
|
snd_emu10k1_fx8010_tram_setup(emu, 0);
|
|
snd_emu10k1_done(emu);
|
|
}
|
|
if (emu->memhdr)
|
|
snd_util_memhdr_free(emu->memhdr);
|
|
if (emu->silent_page.area)
|
|
snd_dma_free_pages(&emu->silent_page);
|
|
if (emu->ptb_pages.area)
|
|
snd_dma_free_pages(&emu->ptb_pages);
|
|
vfree(emu->page_ptr_table);
|
|
vfree(emu->page_addr_table);
|
|
if (emu->irq >= 0)
|
|
free_irq(emu->irq, (void *)emu);
|
|
if (emu->port)
|
|
pci_release_regions(emu->pci);
|
|
pci_disable_device(emu->pci);
|
|
if (emu->card_capabilities->ca0151_chip) /* P16V */
|
|
snd_p16v_free(emu);
|
|
kfree(emu);
|
|
return 0;
|
|
}
|
|
|
|
static int snd_emu10k1_dev_free(snd_device_t *device)
|
|
{
|
|
emu10k1_t *emu = device->device_data;
|
|
return snd_emu10k1_free(emu);
|
|
}
|
|
|
|
static emu_chip_details_t emu_chip_details[] = {
|
|
/* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
|
|
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
|
|
.driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0108_chip = 1,
|
|
.spk71 = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0008,
|
|
.driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0108_chip = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
|
|
.driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spk71 = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
|
|
.driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spk71 = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
|
|
.driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spk71 = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
|
|
.driver = "Audigy2", .name = "Audigy 2 [SB0240]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spk71 = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
|
|
.driver = "Audigy2", .name = "Audigy 2 EX [1005]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spdif_bug = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
|
|
.driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spk71 = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
|
|
.driver = "Audigy2", .name = "Audigy 2 [Unknown]",
|
|
.id = "Audigy2",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ca0151_chip = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10020052,
|
|
.driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
|
|
.id = "Audigy",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.spdif_bug = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
|
|
.driver = "Audigy", .name = "Audigy 1 [SB0090]",
|
|
.id = "Audigy",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
|
|
.driver = "Audigy", .name = "Audigy 1 [SB0090]",
|
|
.id = "Audigy",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0004,
|
|
.driver = "Audigy", .name = "Audigy 1 [Unknown]",
|
|
.id = "Audigy",
|
|
.emu10k2_chip = 1,
|
|
.ca0102_chip = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
|
|
.driver = "EMU10K1", .name = "E-mu APS [4001]",
|
|
.id = "APS",
|
|
.emu10k1_chip = 1,
|
|
.ecard = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
|
|
.driver = "EMU10K1", .name = "SBLive! Player 5.1 [SB0060]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
|
|
.driver = "EMU10K1", .name = "SB Live 5.1",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
|
|
.driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
|
|
.driver = "EMU10K1", .name = "SBLive! [CT4620]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
|
|
.driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [SB0060]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
|
|
.driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
|
|
.driver = "EMU10K1", .name = "SBLive! [SB0105]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{.vendor = 0x1102, .device = 0x0002,
|
|
.driver = "EMU10K1", .name = "SB Live [Unknown]",
|
|
.id = "Live",
|
|
.emu10k1_chip = 1,
|
|
.ac97_chip = 1,
|
|
.sblive51 = 1} ,
|
|
{ } /* terminator */
|
|
};
|
|
|
|
int __devinit snd_emu10k1_create(snd_card_t * card,
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struct pci_dev * pci,
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unsigned short extin_mask,
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unsigned short extout_mask,
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long max_cache_bytes,
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int enable_ir,
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emu10k1_t ** remu)
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{
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emu10k1_t *emu;
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int err;
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int is_audigy;
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unsigned char revision;
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const emu_chip_details_t *c;
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static snd_device_ops_t ops = {
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.dev_free = snd_emu10k1_dev_free,
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};
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*remu = NULL;
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/* enable PCI device */
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if ((err = pci_enable_device(pci)) < 0)
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return err;
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emu = kcalloc(1, sizeof(*emu), GFP_KERNEL);
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if (emu == NULL) {
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pci_disable_device(pci);
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return -ENOMEM;
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}
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emu->card = card;
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spin_lock_init(&emu->reg_lock);
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spin_lock_init(&emu->emu_lock);
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spin_lock_init(&emu->voice_lock);
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spin_lock_init(&emu->synth_lock);
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spin_lock_init(&emu->memblk_lock);
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init_MUTEX(&emu->ptb_lock);
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init_MUTEX(&emu->fx8010.lock);
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INIT_LIST_HEAD(&emu->mapped_link_head);
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INIT_LIST_HEAD(&emu->mapped_order_link_head);
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emu->pci = pci;
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emu->irq = -1;
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emu->synth = NULL;
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emu->get_synth_voice = NULL;
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/* read revision & serial */
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pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
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emu->revision = revision;
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pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
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pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
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snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
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for (c = emu_chip_details; c->vendor; c++) {
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if (c->vendor == pci->vendor && c->device == pci->device) {
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if (c->subsystem && c->subsystem != emu->serial)
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continue;
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if (c->revision && c->revision != emu->revision)
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continue;
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break;
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}
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}
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if (c->vendor == 0) {
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snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
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kfree(emu);
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pci_disable_device(pci);
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return -ENOENT;
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}
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emu->card_capabilities = c;
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if (c->subsystem != 0)
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snd_printdd("Sound card name=%s\n", c->name);
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else
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snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x\n", c->name, pci->vendor, pci->device, emu->serial);
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if (!*card->id && c->id) {
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int i, n = 0;
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strlcpy(card->id, c->id, sizeof(card->id));
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for (;;) {
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for (i = 0; i < snd_ecards_limit; i++) {
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if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
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break;
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}
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if (i >= snd_ecards_limit)
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break;
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n++;
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if (n >= SNDRV_CARDS)
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break;
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snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
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}
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}
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is_audigy = emu->audigy = c->emu10k2_chip;
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/* set the DMA transfer mask */
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emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
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if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
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pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
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snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
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kfree(emu);
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pci_disable_device(pci);
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return -ENXIO;
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}
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if (is_audigy)
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emu->gpr_base = A_FXGPREGBASE;
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else
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emu->gpr_base = FXGPREGBASE;
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if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
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kfree(emu);
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pci_disable_device(pci);
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return err;
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}
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emu->port = pci_resource_start(pci, 0);
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if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
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snd_emu10k1_free(emu);
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return -EBUSY;
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}
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emu->irq = pci->irq;
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emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
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if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
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32 * 1024, &emu->ptb_pages) < 0) {
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snd_emu10k1_free(emu);
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return -ENOMEM;
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}
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emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
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emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
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if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
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snd_emu10k1_free(emu);
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return -ENOMEM;
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}
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if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
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EMUPAGESIZE, &emu->silent_page) < 0) {
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snd_emu10k1_free(emu);
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return -ENOMEM;
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}
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emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
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if (emu->memhdr == NULL) {
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snd_emu10k1_free(emu);
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return -ENOMEM;
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}
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emu->memhdr->block_extra_size = sizeof(emu10k1_memblk_t) - sizeof(snd_util_memblk_t);
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pci_set_master(pci);
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emu->fx8010.fxbus_mask = 0x303f;
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if (extin_mask == 0)
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extin_mask = 0x3fcf;
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if (extout_mask == 0)
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extout_mask = 0x7fff;
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emu->fx8010.extin_mask = extin_mask;
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emu->fx8010.extout_mask = extout_mask;
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if (emu->card_capabilities->ecard) {
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if ((err = snd_emu10k1_ecard_init(emu)) < 0) {
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snd_emu10k1_free(emu);
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return err;
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}
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} else {
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/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
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does not support this, it shouldn't do any harm */
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snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
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}
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if ((err = snd_emu10k1_init(emu, enable_ir)) < 0) {
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snd_emu10k1_free(emu);
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return err;
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}
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if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) {
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snd_emu10k1_free(emu);
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return err;
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}
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snd_emu10k1_proc_init(emu);
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snd_card_set_dev(card, &pci->dev);
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*remu = emu;
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return 0;
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}
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/* memory.c */
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EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
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EXPORT_SYMBOL(snd_emu10k1_synth_free);
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EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
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EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
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EXPORT_SYMBOL(snd_emu10k1_memblk_map);
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/* voice.c */
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EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
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EXPORT_SYMBOL(snd_emu10k1_voice_free);
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/* io.c */
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EXPORT_SYMBOL(snd_emu10k1_ptr_read);
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EXPORT_SYMBOL(snd_emu10k1_ptr_write);
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