197 lines
5.2 KiB
C
197 lines
5.2 KiB
C
/*
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* linux/arch/sh/boards/ec3104/irq.c
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* EC3104 companion chip support
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*
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* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
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*
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*/
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/ec3104/ec3104.h>
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/* This is for debugging mostly; here's the table that I intend to keep
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* in here:
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*
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* index function base addr power interrupt bit
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* 0 power b0ec0000 --- 00000001 (unused)
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* 1 irqs b0ec1000 --- 00000002 (unused)
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* 2 ?? b0ec2000 b0ec0008 00000004
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* 3 PS2 (1) b0ec3000 b0ec000c 00000008
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* 4 PS2 (2) b0ec4000 b0ec0010 00000010
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* 5 ?? b0ec5000 b0ec0014 00000020
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* 6 I2C b0ec6000 b0ec0018 00000040
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* 7 serial (1) b0ec7000 b0ec001c 00000080
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* 8 serial (2) b0ec8000 b0ec0020 00000100
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* 9 serial (3) b0ec9000 b0ec0024 00000200
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* 10 serial (4) b0eca000 b0ec0028 00000400
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* 12 GPIO (1) b0ecc000 b0ec0030
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* 13 GPIO (2) b0ecc000 b0ec0030
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* 16 pcmcia (1) b0ed0000 b0ec0040 00010000
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* 17 pcmcia (2) b0ed1000 b0ec0044 00020000
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*/
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/* I used the register names from another interrupt controller I worked with,
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* since it seems to be identical to the ec3104 except that all bits are
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* inverted:
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*
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* IRR: Interrupt Request Register (pending and enabled interrupts)
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* IMR: Interrupt Mask Register (which interrupts are enabled)
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* IPR: Interrupt Pending Register (pending interrupts, even disabled ones)
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*
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* 0 bits mean pending or enabled, 1 bits mean not pending or disabled. all
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* IRQs seem to be level-triggered.
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*/
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#define EC3104_IRR (EC3104_BASE + 0x1000)
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#define EC3104_IMR (EC3104_BASE + 0x1004)
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#define EC3104_IPR (EC3104_BASE + 0x1008)
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#define ctrl_readl(addr) (*(volatile u32 *)(addr))
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#define ctrl_writel(data,addr) (*(volatile u32 *)(addr) = (data))
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#define ctrl_readb(addr) (*(volatile u8 *)(addr))
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static char *ec3104_name(unsigned index)
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{
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switch(index) {
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case 0:
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return "power management";
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case 1:
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return "interrupts";
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case 3:
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return "PS2 (1)";
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case 4:
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return "PS2 (2)";
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case 5:
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return "I2C (1)";
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case 6:
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return "I2C (2)";
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case 7:
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return "serial (1)";
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case 8:
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return "serial (2)";
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case 9:
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return "serial (3)";
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case 10:
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return "serial (4)";
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case 16:
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return "pcmcia (1)";
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case 17:
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return "pcmcia (2)";
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default: {
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static char buf[32];
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sprintf(buf, "unknown (%d)", index);
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return buf;
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}
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}
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}
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int get_pending_interrupts(char *buf)
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{
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u32 ipr;
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u32 bit;
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char *p = buf;
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p += sprintf(p, "pending: (");
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ipr = ctrl_inl(EC3104_IPR);
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for (bit = 1; bit < 32; bit++)
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if (!(ipr & (1<<bit)))
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p += sprintf(p, "%s ", ec3104_name(bit));
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p += sprintf(p, ")\n");
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return p - buf;
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}
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static inline u32 ec3104_irq2mask(unsigned int irq)
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{
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return (1 << (irq - EC3104_IRQBASE));
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}
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static inline void mask_ec3104_irq(unsigned int irq)
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{
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u32 mask;
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mask = ctrl_readl(EC3104_IMR);
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mask |= ec3104_irq2mask(irq);
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ctrl_writel(mask, EC3104_IMR);
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}
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static inline void unmask_ec3104_irq(unsigned int irq)
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{
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u32 mask;
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mask = ctrl_readl(EC3104_IMR);
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mask &= ~ec3104_irq2mask(irq);
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ctrl_writel(mask, EC3104_IMR);
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}
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static void disable_ec3104_irq(unsigned int irq)
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{
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mask_ec3104_irq(irq);
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}
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static void enable_ec3104_irq(unsigned int irq)
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{
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unmask_ec3104_irq(irq);
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}
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static void mask_and_ack_ec3104_irq(unsigned int irq)
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{
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mask_ec3104_irq(irq);
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}
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static void end_ec3104_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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unmask_ec3104_irq(irq);
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}
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static unsigned int startup_ec3104_irq(unsigned int irq)
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{
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unmask_ec3104_irq(irq);
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return 0;
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}
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static void shutdown_ec3104_irq(unsigned int irq)
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{
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mask_ec3104_irq(irq);
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}
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static struct hw_interrupt_type ec3104_int = {
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.typename = "EC3104",
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.enable = enable_ec3104_irq,
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.disable = disable_ec3104_irq,
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.ack = mask_and_ack_ec3104_irq,
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.end = end_ec3104_irq,
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.startup = startup_ec3104_irq,
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.shutdown = shutdown_ec3104_irq,
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};
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/* Yuck. the _demux API is ugly */
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int ec3104_irq_demux(int irq)
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{
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if (irq == EC3104_IRQ) {
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unsigned int mask;
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mask = ctrl_readl(EC3104_IRR);
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if (mask == 0xffffffff)
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return EC3104_IRQ;
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else
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return EC3104_IRQBASE + ffz(mask);
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}
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return irq;
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}
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