ac840605f3
Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> |
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|---|---|---|
| .. | ||
| bestcomm | ||
| qe_lib | ||
| 6xx-suspend.S | ||
| Kconfig | ||
| Makefile | ||
| axonram.c | ||
| cpm1.c | ||
| cpm2.c | ||
| cpm2_pic.c | ||
| cpm2_pic.h | ||
| cpm_common.c | ||
| dart.h | ||
| dart_iommu.c | ||
| dcr-low.S | ||
| dcr.c | ||
| fsl_gtm.c | ||
| fsl_lbc.c | ||
| fsl_msi.c | ||
| fsl_msi.h | ||
| fsl_pci.c | ||
| fsl_pci.h | ||
| fsl_rio.c | ||
| fsl_soc.c | ||
| fsl_soc.h | ||
| grackle.c | ||
| i8259.c | ||
| indirect_pci.c | ||
| ipic.c | ||
| ipic.h | ||
| micropatch.c | ||
| mmio_nvram.c | ||
| mpc8xx_pic.c | ||
| mpc8xx_pic.h | ||
| mpic.c | ||
| mpic.h | ||
| mpic_msi.c | ||
| mpic_pasemi_msi.c | ||
| mpic_u3msi.c | ||
| mv64x60.h | ||
| mv64x60_dev.c | ||
| mv64x60_pci.c | ||
| mv64x60_pic.c | ||
| mv64x60_udbg.c | ||
| of_rtc.c | ||
| pmi.c | ||
| ppc4xx_pci.c | ||
| ppc4xx_pci.h | ||
| ppc4xx_soc.c | ||
| rtc_cmos_setup.c | ||
| tsi108_dev.c | ||
| tsi108_pci.c | ||
| uic.c | ||
| xilinx_intc.c | ||