172 lines
7.1 KiB
C
172 lines
7.1 KiB
C
/*
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* include/asm-arm/arch-realview/board-eb.h
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*
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* Copyright (C) 2007 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_BOARD_EB_H
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#define __ASM_ARCH_BOARD_EB_H
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#include <asm/arch/platform.h>
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/*
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* RealView EB + ARM11MPCore peripheral addresses
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*/
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#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
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#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
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#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
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#define REALVIEW_EB11MP_TWD_BASE 0x10100700
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#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
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#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
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#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
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#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
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#else
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#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
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#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
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#define REALVIEW_EB11MP_TWD_BASE 0x1F000700
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#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
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#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
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#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
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#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
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#endif
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#define IRQ_EB_GIC_START 32
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/*
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* RealView EB interrupt sources
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*/
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#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
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#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
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#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
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#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
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#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
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#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
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#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
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#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
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#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
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#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
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#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
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#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
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#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
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#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
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#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
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#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
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/*
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* RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
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*/
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#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
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#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
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#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
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#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
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#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
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#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
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#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
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#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
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#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
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#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
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#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
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#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
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#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
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#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
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#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
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#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
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#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
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#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
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#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
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#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
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#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
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#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
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#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
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#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
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#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
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#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
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#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
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#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
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#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
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#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
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#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
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#define IRQ_EB11MP_UART2 -1
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#define IRQ_EB11MP_UART3 -1
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#define IRQ_EB11MP_CLCD -1
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#define IRQ_EB11MP_DMA -1
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#define IRQ_EB11MP_WDOG -1
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#define IRQ_EB11MP_GPIO0 -1
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#define IRQ_EB11MP_GPIO1 -1
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#define IRQ_EB11MP_GPIO2 -1
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#define IRQ_EB11MP_SCI -1
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#define IRQ_EB11MP_SSP -1
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#define NR_GIC_EB11MP 2
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/*
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* Only define NR_IRQS if less than NR_IRQS_EB
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*/
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#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_EB) \
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&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_EB
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#endif
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#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
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&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_EB11MP
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#endif
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/*
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* Core tile identification (REALVIEW_SYS_PROCID)
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*/
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#define REALVIEW_EB_PROC_MASK 0xFF000000
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#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
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#define REALVIEW_EB_PROC_ARM9 0x02000000
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#define REALVIEW_EB_PROC_ARM11 0x04000000
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#define REALVIEW_EB_PROC_ARM11MP 0x06000000
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#define check_eb_proc(proc_type) \
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((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
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== proc_type)
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#ifdef CONFIG_REALVIEW_EB_ARM11MP
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#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
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#else
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#define core_tile_eb11mp() 0
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#endif
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#endif /* __ASM_ARCH_BOARD_EB_H */
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