2021-01-20 01:15:26 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __DT_QCOM_LPASS_H
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#define __DT_QCOM_LPASS_H
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#define MI2S_PRIMARY 0
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#define MI2S_SECONDARY 1
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#define MI2S_TERTIARY 2
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#define MI2S_QUATERNARY 3
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#define MI2S_QUINARY 4
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#define LPASS_DP_RX 5
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2021-09-06 21:27:34 +08:00
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#define LPASS_CDC_DMA_RX0 6
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2021-10-08 13:21:31 +08:00
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#define LPASS_CDC_DMA_RX1 7
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#define LPASS_CDC_DMA_RX2 8
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#define LPASS_CDC_DMA_RX3 9
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#define LPASS_CDC_DMA_RX4 10
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#define LPASS_CDC_DMA_RX5 11
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#define LPASS_CDC_DMA_RX6 12
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#define LPASS_CDC_DMA_RX7 13
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#define LPASS_CDC_DMA_RX8 14
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#define LPASS_CDC_DMA_RX9 15
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#define LPASS_CDC_DMA_TX0 16
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#define LPASS_CDC_DMA_TX1 17
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#define LPASS_CDC_DMA_TX2 18
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#define LPASS_CDC_DMA_TX3 19
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#define LPASS_CDC_DMA_TX4 20
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#define LPASS_CDC_DMA_TX5 21
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#define LPASS_CDC_DMA_TX6 22
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#define LPASS_CDC_DMA_TX7 23
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#define LPASS_CDC_DMA_TX8 24
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#define LPASS_CDC_DMA_VA_TX0 25
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#define LPASS_CDC_DMA_VA_TX1 26
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#define LPASS_CDC_DMA_VA_TX2 27
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#define LPASS_CDC_DMA_VA_TX3 28
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#define LPASS_CDC_DMA_VA_TX4 29
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#define LPASS_CDC_DMA_VA_TX5 30
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#define LPASS_CDC_DMA_VA_TX6 31
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#define LPASS_CDC_DMA_VA_TX7 32
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#define LPASS_CDC_DMA_VA_TX8 33
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2021-09-06 21:27:34 +08:00
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2021-01-20 01:15:26 +08:00
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#define LPASS_MCLK0 0
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#endif /* __DT_QCOM_LPASS_H */
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