105 lines
4.3 KiB
ReStructuredText
105 lines
4.3 KiB
ReStructuredText
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==================================
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Register File Data Sampling (RFDS)
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==================================
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Register File Data Sampling (RFDS) is a microarchitectural vulnerability that
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only affects Intel Atom parts(also branded as E-cores). RFDS may allow
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a malicious actor to infer data values previously used in floating point
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registers, vector registers, or integer registers. RFDS does not provide the
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ability to choose which data is inferred. CVE-2023-28746 is assigned to RFDS.
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Affected Processors
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===================
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Below is the list of affected Intel processors [#f1]_:
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=================== ============
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Common name Family_Model
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=================== ============
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ATOM_GOLDMONT 06_5CH
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ATOM_GOLDMONT_D 06_5FH
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ATOM_GOLDMONT_PLUS 06_7AH
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ATOM_TREMONT_D 06_86H
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ATOM_TREMONT 06_96H
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ALDERLAKE 06_97H
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ALDERLAKE_L 06_9AH
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ATOM_TREMONT_L 06_9CH
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RAPTORLAKE 06_B7H
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RAPTORLAKE_P 06_BAH
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ATOM_GRACEMONT 06_BEH
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RAPTORLAKE_S 06_BFH
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=================== ============
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As an exception to this table, Intel Xeon E family parts ALDERLAKE(06_97H) and
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RAPTORLAKE(06_B7H) codenamed Catlow are not affected. They are reported as
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vulnerable in Linux because they share the same family/model with an affected
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part. Unlike their affected counterparts, they do not enumerate RFDS_CLEAR or
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CPUID.HYBRID. This information could be used to distinguish between the
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affected and unaffected parts, but it is deemed not worth adding complexity as
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the reporting is fixed automatically when these parts enumerate RFDS_NO.
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Mitigation
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==========
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Intel released a microcode update that enables software to clear sensitive
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information using the VERW instruction. Like MDS, RFDS deploys the same
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mitigation strategy to force the CPU to clear the affected buffers before an
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attacker can extract the secrets. This is achieved by using the otherwise
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unused and obsolete VERW instruction in combination with a microcode update.
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The microcode clears the affected CPU buffers when the VERW instruction is
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executed.
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Mitigation points
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-----------------
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VERW is executed by the kernel before returning to user space, and by KVM
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before VMentry. None of the affected cores support SMT, so VERW is not required
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at C-state transitions.
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New bits in IA32_ARCH_CAPABILITIES
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----------------------------------
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Newer processors and microcode update on existing affected processors added new
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bits to IA32_ARCH_CAPABILITIES MSR. These bits can be used to enumerate
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vulnerability and mitigation capability:
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- Bit 27 - RFDS_NO - When set, processor is not affected by RFDS.
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- Bit 28 - RFDS_CLEAR - When set, processor is affected by RFDS, and has the
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microcode that clears the affected buffers on VERW execution.
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Mitigation control on the kernel command line
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---------------------------------------------
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The kernel command line allows to control RFDS mitigation at boot time with the
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parameter "reg_file_data_sampling=". The valid arguments are:
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========== =================================================================
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on If the CPU is vulnerable, enable mitigation; CPU buffer clearing
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on exit to userspace and before entering a VM.
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off Disables mitigation.
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========== =================================================================
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Mitigation default is selected by CONFIG_MITIGATION_RFDS.
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Mitigation status information
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-----------------------------
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The Linux kernel provides a sysfs interface to enumerate the current
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vulnerability status of the system: whether the system is vulnerable, and
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which mitigations are active. The relevant sysfs file is:
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/sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling
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The possible values in this file are:
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.. list-table::
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* - 'Not affected'
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- The processor is not vulnerable
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* - 'Vulnerable'
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- The processor is vulnerable, but no mitigation enabled
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* - 'Vulnerable: No microcode'
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- The processor is vulnerable but microcode is not updated.
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* - 'Mitigation: Clear Register File'
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- The processor is vulnerable and the CPU buffer clearing mitigation is
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enabled.
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References
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----------
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.. [#f1] Affected Processors
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https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html
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