2010-01-26 09:11:04 +08:00
|
|
|
/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
|
2009-03-25 19:01:24 +08:00
|
|
|
*
|
|
|
|
|
* Copyright 2008 Simtec Electronics
|
|
|
|
|
* Copyright 2008 Simtec Electronics
|
|
|
|
|
* Ben Dooks <ben@simtec.co.uk>
|
|
|
|
|
* http://armlinux.simtec.co.uk/
|
|
|
|
|
*
|
2010-01-26 09:38:52 +08:00
|
|
|
* S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
|
2009-03-25 19:01:24 +08:00
|
|
|
*
|
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
|
#include <linux/types.h>
|
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
|
#include <linux/io.h>
|
|
|
|
|
|
|
|
|
|
#include <linux/mmc/card.h>
|
|
|
|
|
#include <linux/mmc/host.h>
|
|
|
|
|
|
|
|
|
|
#include <plat/regs-sdhci.h>
|
|
|
|
|
#include <plat/sdhci.h>
|
|
|
|
|
|
|
|
|
|
/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
|
|
|
|
|
|
2010-01-26 09:38:52 +08:00
|
|
|
char *s3c64xx_hsmmc_clksrcs[4] = {
|
2009-03-25 19:01:24 +08:00
|
|
|
[0] = "hsmmc",
|
|
|
|
|
[1] = "hsmmc",
|
|
|
|
|
[2] = "mmc_bus",
|
tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-11-14 23:09:05 +08:00
|
|
|
/* [3] = "48m", - note not successfully used yet */
|
2009-03-25 19:01:24 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
|
|
|
|
|
void __iomem *r,
|
|
|
|
|
struct mmc_ios *ios,
|
|
|
|
|
struct mmc_card *card)
|
|
|
|
|
{
|
|
|
|
|
u32 ctrl2, ctrl3;
|
|
|
|
|
|
|
|
|
|
ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
|
|
|
|
|
ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
|
|
|
|
|
ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
|
|
|
|
|
S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
|
|
|
|
|
S3C_SDHCI_CTRL2_ENFBCLKRX |
|
|
|
|
|
S3C_SDHCI_CTRL2_DFCNT_NONE |
|
|
|
|
|
S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
|
|
|
|
|
|
|
|
|
|
if (ios->clock < 25 * 1000000)
|
|
|
|
|
ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
|
|
|
|
|
S3C_SDHCI_CTRL3_FCSEL2 |
|
|
|
|
|
S3C_SDHCI_CTRL3_FCSEL1 |
|
|
|
|
|
S3C_SDHCI_CTRL3_FCSEL0);
|
|
|
|
|
else
|
|
|
|
|
ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
|
|
|
|
|
|
2011-03-04 06:55:44 +08:00
|
|
|
pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
|
2009-03-25 19:01:24 +08:00
|
|
|
writel(ctrl2, r + S3C_SDHCI_CONTROL2);
|
|
|
|
|
writel(ctrl3, r + S3C_SDHCI_CONTROL3);
|
|
|
|
|
}
|
|
|
|
|
|
2010-01-26 09:38:52 +08:00
|
|
|
void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
|
|
|
|
|
void __iomem *r,
|
|
|
|
|
struct mmc_ios *ios,
|
|
|
|
|
struct mmc_card *card)
|
|
|
|
|
{
|
|
|
|
|
writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
|
|
|
|
|
|
|
|
|
|
s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
|
|
|
|
|
}
|
