67 lines
2.4 KiB
C
67 lines
2.4 KiB
C
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/*****************************************************************************
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* Copyright 2001 - 2008 Broadcom Corporation. All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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/*
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*
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*****************************************************************************
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*
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* REG_NAND.h
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*
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* PURPOSE:
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*
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* This file contains definitions for the nand registers:
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*
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* NOTES:
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*
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*****************************************************************************/
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#if !defined(__ASM_ARCH_REG_NAND_H)
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#define __ASM_ARCH_REG_NAND_H
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/* ---- Include Files ---------------------------------------------------- */
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#include <csp/reg.h>
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#include <mach/reg_umi.h>
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/* ---- Constants and Types ---------------------------------------------- */
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#define HW_NAND_BASE MM_IO_BASE_NAND /* NAND Flash */
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/* DMA accesses by the bootstrap need hard nonvirtual addresses */
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#define REG_NAND_CMD __REG16(HW_NAND_BASE + 0)
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#define REG_NAND_ADDR __REG16(HW_NAND_BASE + 4)
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#define REG_NAND_PHYS_DATA16 (HW_NAND_BASE + 8)
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#define REG_NAND_PHYS_DATA8 (HW_NAND_BASE + 8)
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#define REG_NAND_DATA16 __REG16(REG_NAND_PHYS_DATA16)
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#define REG_NAND_DATA8 __REG8(REG_NAND_PHYS_DATA8)
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/* use appropriate offset to make sure it start at the 1K boundary */
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#define REG_NAND_PHYS_DATA_DMA (HW_NAND_BASE + 0x400)
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#define REG_NAND_DATA_DMA __REG32(REG_NAND_PHYS_DATA_DMA)
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/* Linux DMA requires physical address of the data register */
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#define REG_NAND_DATA16_PADDR HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA16)
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#define REG_NAND_DATA8_PADDR HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA8)
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#define REG_NAND_DATA_PADDR HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA_DMA)
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#define NAND_BUS_16BIT() (0)
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#define NAND_BUS_8BIT() (!NAND_BUS_16BIT())
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/* Register offsets */
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#define REG_NAND_CMD_OFFSET (0)
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#define REG_NAND_ADDR_OFFSET (4)
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#define REG_NAND_DATA8_OFFSET (8)
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#endif
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