2019-10-28 23:15:33 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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* Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
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*
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* Samsung Exynos SoC Adaptive Supply Voltage support
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*/
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#include <linux/cpu.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_opp.h>
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#include <linux/regmap.h>
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#include <linux/soc/samsung/exynos-chipid.h>
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#include "exynos-asv.h"
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#include "exynos5422-asv.h"
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#define MHZ 1000000U
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static int exynos_asv_update_cpu_opps(struct exynos_asv *asv,
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struct device *cpu)
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{
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struct exynos_asv_subsys *subsys = NULL;
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struct dev_pm_opp *opp;
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unsigned int opp_freq;
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int i;
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for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) {
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if (of_device_is_compatible(cpu->of_node,
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asv->subsys[i].cpu_dt_compat)) {
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subsys = &asv->subsys[i];
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break;
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}
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}
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if (!subsys)
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return -EINVAL;
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for (i = 0; i < subsys->table.num_rows; i++) {
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unsigned int new_volt, volt;
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int ret;
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opp_freq = exynos_asv_opp_get_frequency(subsys, i);
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opp = dev_pm_opp_find_freq_exact(cpu, opp_freq * MHZ, true);
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if (IS_ERR(opp)) {
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dev_info(asv->dev, "cpu%d opp%d, freq: %u missing\n",
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cpu->id, i, opp_freq);
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continue;
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}
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volt = dev_pm_opp_get_voltage(opp);
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new_volt = asv->opp_get_voltage(subsys, i, volt);
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dev_pm_opp_put(opp);
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if (new_volt == volt)
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continue;
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ret = dev_pm_opp_adjust_voltage(cpu, opp_freq * MHZ,
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new_volt, new_volt, new_volt);
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if (ret < 0)
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dev_err(asv->dev,
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"Failed to adjust OPP %u Hz/%u uV for cpu%d\n",
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opp_freq, new_volt, cpu->id);
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else
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dev_dbg(asv->dev,
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"Adjusted OPP %u Hz/%u -> %u uV, cpu%d\n",
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opp_freq, volt, new_volt, cpu->id);
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}
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return 0;
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}
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static int exynos_asv_update_opps(struct exynos_asv *asv)
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{
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struct opp_table *last_opp_table = NULL;
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struct device *cpu;
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int ret, cpuid;
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for_each_possible_cpu(cpuid) {
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struct opp_table *opp_table;
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cpu = get_cpu_device(cpuid);
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if (!cpu)
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continue;
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opp_table = dev_pm_opp_get_opp_table(cpu);
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2019-10-30 02:27:42 +08:00
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if (IS_ERR_OR_NULL(opp_table))
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2019-10-28 23:15:33 +08:00
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continue;
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if (!last_opp_table || opp_table != last_opp_table) {
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last_opp_table = opp_table;
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ret = exynos_asv_update_cpu_opps(asv, cpu);
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if (ret < 0)
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dev_err(asv->dev, "Couldn't udate OPPs for cpu%d\n",
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cpuid);
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}
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dev_pm_opp_put_opp_table(opp_table);
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}
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return 0;
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}
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static int exynos_asv_probe(struct platform_device *pdev)
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{
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int (*probe_func)(struct exynos_asv *asv);
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struct exynos_asv *asv;
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struct device *cpu_dev;
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u32 product_id = 0;
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int ret, i;
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cpu_dev = get_cpu_device(0);
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ret = dev_pm_opp_get_opp_count(cpu_dev);
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if (ret < 0)
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return -EPROBE_DEFER;
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asv = devm_kzalloc(&pdev->dev, sizeof(*asv), GFP_KERNEL);
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if (!asv)
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return -ENOMEM;
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asv->chipid_regmap = device_node_to_regmap(pdev->dev.of_node);
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if (IS_ERR(asv->chipid_regmap)) {
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dev_err(&pdev->dev, "Could not find syscon regmap\n");
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return PTR_ERR(asv->chipid_regmap);
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}
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regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID, &product_id);
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switch (product_id & EXYNOS_MASK) {
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case 0xE5422000:
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probe_func = exynos5422_asv_init;
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break;
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default:
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return -ENODEV;
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}
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ret = of_property_read_u32(pdev->dev.of_node, "samsung,asv-bin",
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&asv->of_bin);
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if (ret < 0)
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asv->of_bin = -EINVAL;
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asv->dev = &pdev->dev;
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dev_set_drvdata(&pdev->dev, asv);
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for (i = 0; i < ARRAY_SIZE(asv->subsys); i++)
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asv->subsys[i].asv = asv;
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ret = probe_func(asv);
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if (ret < 0)
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return ret;
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return exynos_asv_update_opps(asv);
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}
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static const struct of_device_id exynos_asv_of_device_ids[] = {
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{ .compatible = "samsung,exynos4210-chipid" },
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{}
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};
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static struct platform_driver exynos_asv_driver = {
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.driver = {
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.name = "exynos-asv",
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.of_match_table = exynos_asv_of_device_ids,
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},
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.probe = exynos_asv_probe,
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};
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module_platform_driver(exynos_asv_driver);
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