2019-05-29 22:18:02 +08:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
2015-07-31 05:57:47 +08:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2014-2015, Intel Corporation.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __NVDIMM_PFN_H
|
|
|
|
#define __NVDIMM_PFN_H
|
|
|
|
|
|
|
|
#include <linux/types.h>
|
2016-03-04 01:14:36 +08:00
|
|
|
#include <linux/mmzone.h>
|
2015-07-31 05:57:47 +08:00
|
|
|
|
|
|
|
#define PFN_SIG_LEN 16
|
|
|
|
#define PFN_SIG "NVDIMM_PFN_INFO\0"
|
2016-05-19 05:50:12 +08:00
|
|
|
#define DAX_SIG "NVDIMM_DAX_INFO\0"
|
2015-07-31 05:57:47 +08:00
|
|
|
|
|
|
|
struct nd_pfn_sb {
|
|
|
|
u8 signature[PFN_SIG_LEN];
|
|
|
|
u8 uuid[16];
|
|
|
|
u8 parent_uuid[16];
|
|
|
|
__le32 flags;
|
|
|
|
__le16 version_major;
|
|
|
|
__le16 version_minor;
|
2016-03-04 01:38:00 +08:00
|
|
|
__le64 dataoff; /* relative to namespace_base + start_pad */
|
2015-07-31 05:57:47 +08:00
|
|
|
__le64 npfns;
|
|
|
|
__le32 mode;
|
2016-03-04 01:38:00 +08:00
|
|
|
/* minor-version-1 additions for section alignment */
|
|
|
|
__le32 start_pad;
|
|
|
|
__le32 end_trunc;
|
2016-04-01 06:41:18 +08:00
|
|
|
/* minor-version-2 record the base alignment of the mapping */
|
|
|
|
__le32 align;
|
|
|
|
u8 padding[4000];
|
2015-07-31 05:57:47 +08:00
|
|
|
__le64 checksum;
|
|
|
|
};
|
2016-03-04 01:14:36 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_SPARSEMEM
|
|
|
|
#define PFN_SECTION_ALIGN_DOWN(x) SECTION_ALIGN_DOWN(x)
|
|
|
|
#define PFN_SECTION_ALIGN_UP(x) SECTION_ALIGN_UP(x)
|
|
|
|
#else
|
|
|
|
/*
|
|
|
|
* In this case ZONE_DEVICE=n and we will disable 'pfn' device support,
|
|
|
|
* but we still want pmem to compile.
|
|
|
|
*/
|
|
|
|
#define PFN_SECTION_ALIGN_DOWN(x) (x)
|
|
|
|
#define PFN_SECTION_ALIGN_UP(x) (x)
|
|
|
|
#endif
|
2016-03-04 01:38:00 +08:00
|
|
|
|
|
|
|
#define PHYS_SECTION_ALIGN_DOWN(x) PFN_PHYS(PFN_SECTION_ALIGN_DOWN(PHYS_PFN(x)))
|
|
|
|
#define PHYS_SECTION_ALIGN_UP(x) PFN_PHYS(PFN_SECTION_ALIGN_UP(PHYS_PFN(x)))
|
2015-07-31 05:57:47 +08:00
|
|
|
#endif /* __NVDIMM_PFN_H */
|