99 lines
2.0 KiB
ArmAsm
99 lines
2.0 KiB
ArmAsm
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <hv/hypervisor.h>
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/* Text loads starting from the supervisor interrupt vector address. */
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#define TEXT_OFFSET MEM_SV_INTRPT
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OUTPUT_ARCH(tile)
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ENTRY(_start)
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jiffies = jiffies_64;
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PHDRS
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{
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intrpt1 PT_LOAD ;
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text PT_LOAD ;
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data PT_LOAD ;
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}
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SECTIONS
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{
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/* Text is loaded with a different VA than data; start with text. */
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#undef LOAD_OFFSET
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#define LOAD_OFFSET TEXT_OFFSET
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/* Interrupt vectors */
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.intrpt1 (LOAD_OFFSET) : AT ( 0 ) /* put at the start of physical memory */
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{
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_text = .;
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_stext = .;
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*(.intrpt1)
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} :intrpt1 =0
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/* Hypervisor call vectors */
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#include "hvglue.lds"
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/* Now the real code */
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. = ALIGN(0x20000);
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HEAD_TEXT_SECTION :text =0
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.text : AT (ADDR(.text) - LOAD_OFFSET) {
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SCHED_TEXT
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LOCK_TEXT
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__fix_text_end = .; /* tile-cpack won't rearrange before this */
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TEXT_TEXT
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*(.text.*)
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*(.coldtext*)
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*(.fixup)
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*(.gnu.warning)
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}
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_etext = .;
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/* "Init" is divided into two areas with very different virtual addresses. */
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INIT_TEXT_SECTION(PAGE_SIZE)
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/* Now we skip back to PAGE_OFFSET for the data. */
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. = (. - TEXT_OFFSET + PAGE_OFFSET);
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#undef LOAD_OFFSET
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#define LOAD_OFFSET PAGE_OFFSET
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. = ALIGN(PAGE_SIZE);
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VMLINUX_SYMBOL(_sinitdata) = .;
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.init.page : AT (ADDR(.init.page) - LOAD_OFFSET) {
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*(.init.page)
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} :data =0
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INIT_DATA_SECTION(16)
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PERCPU(PAGE_SIZE)
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. = ALIGN(PAGE_SIZE);
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VMLINUX_SYMBOL(_einitdata) = .;
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_sdata = .; /* Start of data section */
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RO_DATA_SECTION(PAGE_SIZE)
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/* initially writeable, then read-only */
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. = ALIGN(PAGE_SIZE);
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__w1data_begin = .;
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.w1data : AT(ADDR(.w1data) - LOAD_OFFSET) {
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VMLINUX_SYMBOL(__w1data_begin) = .;
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*(.w1data)
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VMLINUX_SYMBOL(__w1data_end) = .;
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}
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RW_DATA_SECTION(L2_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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_edata = .;
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EXCEPTION_TABLE(L2_CACHE_BYTES)
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NOTES
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BSS_SECTION(8, PAGE_SIZE, 1)
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_end = . ;
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STABS_DEBUG
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DWARF_DEBUG
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DISCARDS
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}
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