2005-04-17 06:20:36 +08:00
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/*
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2008-08-05 23:14:15 +08:00
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* arch/arm/mach-l7200/include/mach/memory.h
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2005-04-17 06:20:36 +08:00
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*
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* Copyright (c) 2000 Steve Hill (sjhill@cotw.com)
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* Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net)
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*
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* Changelog:
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* 03-13-2000 SJH Created
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* 04-13-2000 RS Changed bus macros for new addr
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* 05-03-2000 SJH Removed bus macros and fixed virt_to_phys macro
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*/
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H
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/*
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* Physical DRAM offset on the L7200 SDB.
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*/
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2005-10-30 04:44:55 +08:00
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#define PHYS_OFFSET UL(0xf0000000)
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2005-04-17 06:20:36 +08:00
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2006-04-05 04:47:43 +08:00
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/*
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* Cache flushing area - ROM
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*/
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#define FLUSH_BASE_PHYS 0x40000000
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#define FLUSH_BASE 0xdf000000
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2005-04-17 06:20:36 +08:00
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#endif
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