2009-02-02 21:11:54 +08:00
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/*
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* IRAM
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*/
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#define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */
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#define MX35_IRAM_SIZE SZ_128K
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#define MXC_FEC_BASE_ADDR 0x50038000
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2009-04-17 22:52:25 +08:00
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#define MX35_OTG_BASE_ADDR 0x53ff4000
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2009-02-02 21:11:54 +08:00
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#define MX35_NFC_BASE_ADDR 0xBB000000
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/*
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* Interrupt numbers
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*/
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#define MXC_INT_OWIRE 2
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#define MX35_INT_MMC_SDHC1 7
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#define MXC_INT_MMC_SDHC2 8
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#define MXC_INT_MMC_SDHC3 9
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#define MX35_INT_SSI1 11
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#define MX35_INT_SSI2 12
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#define MXC_INT_GPU2D 16
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#define MXC_INT_ASRC 17
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#define MXC_INT_USBHS 35
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#define MXC_INT_USBOTG 37
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#define MXC_INT_ESAI 40
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#define MXC_INT_CAN1 43
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#define MXC_INT_CAN2 44
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#define MXC_INT_MLB 46
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#define MXC_INT_SPDIF 47
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#define MXC_INT_FEC 57
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