2010-07-26 20:08:52 +08:00
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/* linux/arch/arm/mach-s5pv310/include/mach/map.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV310 - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MAP_H
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#define __ASM_ARCH_MAP_H __FILE__
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#include <plat/map-base.h>
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/*
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* S5PV310 UART offset is 0x10000 but the older S5P SoCs are 0x400.
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* So need to define it, and here is to avoid redefinition warning.
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*/
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#define S3C_UART_OFFSET (0x10000)
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#include <plat/map-s5p.h>
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2010-08-27 16:57:44 +08:00
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#define S5PV310_PA_SYSRAM (0x02025000)
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2010-10-25 15:30:40 +08:00
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#define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000))
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2010-08-27 12:56:54 +08:00
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#define S5PC210_PA_ONENAND (0x0C000000)
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#define S5P_PA_ONENAND S5PC210_PA_ONENAND
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#define S5PC210_PA_ONENAND_DMA (0x0C600000)
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#define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA
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2010-07-26 20:08:52 +08:00
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#define S5PV310_PA_CHIPID (0x10000000)
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#define S5P_PA_CHIPID S5PV310_PA_CHIPID
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2010-09-29 19:42:15 +08:00
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#define S5PV310_PA_SYSCON (0x10010000)
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2010-07-26 20:08:52 +08:00
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#define S5P_PA_SYSCON S5PV310_PA_SYSCON
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2010-08-18 20:45:49 +08:00
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#define S5PV310_PA_CMU (0x10030000)
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2010-07-26 20:08:52 +08:00
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#define S5PV310_PA_WATCHDOG (0x10060000)
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2010-09-20 14:25:51 +08:00
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#define S5PV310_PA_RTC (0x10070000)
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2010-07-26 20:08:52 +08:00
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#define S5PV310_PA_COMBINER (0x10448000)
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#define S5PV310_PA_COREPERI (0x10500000)
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#define S5PV310_PA_GIC_CPU (0x10500100)
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#define S5PV310_PA_TWD (0x10500600)
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#define S5PV310_PA_GIC_DIST (0x10501000)
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#define S5PV310_PA_L2CC (0x10502000)
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2010-08-20 19:41:31 +08:00
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#define S5PV310_PA_GPIO1 (0x11400000)
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#define S5PV310_PA_GPIO2 (0x11000000)
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#define S5PV310_PA_GPIO3 (0x03860000)
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#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
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2010-07-26 20:08:52 +08:00
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2010-10-25 15:30:40 +08:00
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#define S5PV310_PA_SROMC (0x12570000)
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2010-07-26 20:08:52 +08:00
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#define S5PV310_PA_UART (0x13800000)
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#define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET))
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#define S5P_PA_UART0 S5P_PA_UART(0)
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#define S5P_PA_UART1 S5P_PA_UART(1)
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#define S5P_PA_UART2 S5P_PA_UART(2)
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#define S5P_PA_UART3 S5P_PA_UART(3)
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#define S5P_PA_UART4 S5P_PA_UART(4)
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#define S5P_SZ_UART SZ_256
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2010-10-12 06:49:20 +08:00
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#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
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2010-07-26 20:08:52 +08:00
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#define S5PV310_PA_TIMER (0x139D0000)
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#define S5P_PA_TIMER S5PV310_PA_TIMER
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#define S5PV310_PA_SDRAM (0x40000000)
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#define S5P_PA_SDRAM S5PV310_PA_SDRAM
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/* compatibiltiy defines. */
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#define S3C_PA_UART S5PV310_PA_UART
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2010-08-20 19:41:31 +08:00
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#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0)
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#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1)
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#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2)
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#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3)
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2010-10-12 06:49:20 +08:00
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#define S3C_PA_IIC S5PV310_PA_IIC(0)
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#define S3C_PA_IIC1 S5PV310_PA_IIC(1)
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#define S3C_PA_IIC2 S5PV310_PA_IIC(2)
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#define S3C_PA_IIC3 S5PV310_PA_IIC(3)
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#define S3C_PA_IIC4 S5PV310_PA_IIC(4)
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#define S3C_PA_IIC5 S5PV310_PA_IIC(5)
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#define S3C_PA_IIC6 S5PV310_PA_IIC(6)
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#define S3C_PA_IIC7 S5PV310_PA_IIC(7)
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2010-09-20 14:25:51 +08:00
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#define S3C_PA_RTC S5PV310_PA_RTC
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2010-07-26 20:08:52 +08:00
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#define S3C_PA_WDT S5PV310_PA_WATCHDOG
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#endif /* __ASM_ARCH_MAP_H */
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