2007-07-10 05:06:53 +08:00
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/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_IRQS_H__
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#define __ASM_ARCH_MXC_IRQS_H__
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2008-12-18 18:08:55 +08:00
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/*
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* So far all i.MX SoCs have 64 internal interrupts
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*/
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#define MXC_INTERNAL_IRQS 64
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#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS
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#if defined CONFIG_ARCH_MX1
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#define MXC_GPIO_IRQS (32 * 4)
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#elif defined CONFIG_ARCH_MX2
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#define MXC_GPIO_IRQS (32 * 6)
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#elif defined CONFIG_ARCH_MX3
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#define MXC_GPIO_IRQS (32 * 3)
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#endif
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/*
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* The next 16 interrupts are for board specific purposes. Since
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* the kernel can only run on one machine at a time, we can re-use
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* these. If you need more, increase MXC_BOARD_IRQS, but keep it
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* within sensible limits.
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*/
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#define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
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#define MXC_BOARD_IRQS 16
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#define NR_IRQS (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS)
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2008-09-09 17:29:41 +08:00
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extern void imx_irq_set_priority(unsigned char irq, unsigned char prio);
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2007-07-10 05:06:53 +08:00
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2008-11-14 18:01:39 +08:00
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/* all normal IRQs can be FIQs */
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#define FIQ_START 0
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/* switch betwean IRQ and FIQ */
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extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
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2008-03-28 17:59:08 +08:00
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#endif /* __ASM_ARCH_MXC_IRQS_H__ */
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