100 lines
1.8 KiB
ArmAsm
100 lines
1.8 KiB
ArmAsm
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/*
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* Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Interrupt exception dispatch code.
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*
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*/
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#include <linux/config.h>
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include <asm/mips-boards/simint.h>
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.text
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.set noreorder
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.set noat
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.align 5
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NESTED(simIRQ, PT_SIZE, sp)
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SAVE_ALL
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CLI
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.set at
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mfc0 s0, CP0_CAUSE # get irq bits
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mfc0 s1, CP0_STATUS # get irq mask
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andi s0, ST0_IM # CAUSE.CE may be non-zero!
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and s0, s1
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#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
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.set mips32
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clz a0, s0
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.set mips0
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negu a0
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addu a0, 31-CAUSEB_IP
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bltz a0, spurious
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#else
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beqz s0, spurious
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li a0, 7
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and t0, s0, 0xf000
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sltiu t0, t0, 1
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sll t0, 2
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subu a0, t0
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sll s0, t0
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and t0, s0, 0xc000
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sltiu t0, t0, 1
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sll t0, 1
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subu a0, t0
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sll s0, t0
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and t0, s0, 0x8000
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sltiu t0, t0, 1
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# sll t0, 0
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subu a0, t0
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# sll s0, t0
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#endif
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#ifdef CASCADE_IRQ
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li a1, CASCADE_IRQ
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bne a0, a1, 1f
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addu a0, MIPSCPU_INT_BASE
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jal CASCADE_DISPATCH
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move a0, sp
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j ret_from_irq
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nop
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1:
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#else
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addu a0, MIPSCPU_INT_BASE
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#endif
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jal do_IRQ
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move a1, sp
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j ret_from_irq
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nop
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spurious:
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j spurious_interrupt
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nop
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END(simIRQ)
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