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Merge branch acpi-x86 

Merge a fix for a suspend issue related to storage handling on multiple
systems based on AMD hardware:

 - Make more devices put NVMe storage devices into D3 at suspend to work
   around missing StorageD3Enable _DSD in the BIOS (Mario Limonciello).

* branch acpi-x86:
  ACPI: x86: Force StorageD3Enable on more products
This commit is contained in:
Rafael J. Wysocki 2024-06-14 14:27:16 +02:00
parent 0e6b6dedf1 e79a10652b
commit 04f82fbb86
1 changed files with 10 additions and 14 deletions
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24
drivers/acpi/x86/utils.c
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@ -206,16 +206,16 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
}
/*
* AMD systems from Renoir and Lucienne *require* that the NVME controller
* AMD systems from Renoir onwards *require* that the NVME controller
* is put into D3 over a Modern Standby / suspend-to-idle cycle.
*
* This is "typically" accomplished using the `StorageD3Enable`
* property in the _DSD that is checked via the `acpi_storage_d3` function
* but this property was introduced after many of these systems launched
* and most OEM systems don't have it in their BIOS.
* but some OEM systems still don't have it in their BIOS.
*
* The Microsoft documentation for StorageD3Enable mentioned that Windows has
* a hardcoded allowlist for D3 support, which was used for these platforms.
* a hardcoded allowlist for D3 support as well as a registry key to override
* the BIOS, which has been used for these cases.
*
* This allows quirking on Linux in a similar fashion.
*
@ -228,19 +228,15 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
* https://bugzilla.kernel.org/show_bug.cgi?id=216773
* https://bugzilla.kernel.org/show_bug.cgi?id=217003
* 2) On at least one HP system StorageD3Enable is missing on the second NVME
disk in the system.
* disk in the system.
* 3) On at least one HP Rembrandt system StorageD3Enable is missing on the only
* NVME device.
*/
static const struct x86_cpu_id storage_d3_cpu_ids[] = {
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */
{}
};
bool force_storage_d3(void)
{
return x86_match_cpu(storage_d3_cpu_ids);
if (!cpu_feature_enabled(X86_FEATURE_ZEN))
return false;
return acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0;
}
/*