clock, reset: microchip: move all mpfs reset code to the reset subsystem
Stephen and Philipp, while reviewing patches, said that all of the aux device creation and the register read/write code could be moved to the reset subsystem, leaving the clock driver with no implementations of reset_* functions at all. Move them. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240424-strangle-sharpener-34755c5e6e3e@spud Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Conor Dooley
Stephen Boyd
parent
4cece76496
commit
098c290a49
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@ -4,12 +4,10 @@
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*
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* Copyright (C) 2020-2022 Microchip Technology Inc. All rights reserved.
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*/
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#include <linux/auxiliary_bus.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <dt-bindings/clock/microchip,mpfs-clock.h>
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#include <soc/microchip/mpfs.h>
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@ -361,93 +359,6 @@ static int mpfs_clk_register_periphs(struct device *dev, struct mpfs_periph_hw_c
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return 0;
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}
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/*
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* Peripheral clock resets
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*/
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#if IS_ENABLED(CONFIG_RESET_CONTROLLER)
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u32 mpfs_reset_read(struct device *dev)
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{
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struct mpfs_clock_data *clock_data = dev_get_drvdata(dev->parent);
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return readl_relaxed(clock_data->base + REG_SUBBLK_RESET_CR);
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}
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EXPORT_SYMBOL_NS_GPL(mpfs_reset_read, MCHP_CLK_MPFS);
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void mpfs_reset_write(struct device *dev, u32 val)
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{
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struct mpfs_clock_data *clock_data = dev_get_drvdata(dev->parent);
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writel_relaxed(val, clock_data->base + REG_SUBBLK_RESET_CR);
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}
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EXPORT_SYMBOL_NS_GPL(mpfs_reset_write, MCHP_CLK_MPFS);
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static void mpfs_reset_unregister_adev(void *_adev)
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{
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struct auxiliary_device *adev = _adev;
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auxiliary_device_delete(adev);
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auxiliary_device_uninit(adev);
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}
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static void mpfs_reset_adev_release(struct device *dev)
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{
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struct auxiliary_device *adev = to_auxiliary_dev(dev);
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kfree(adev);
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}
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static struct auxiliary_device *mpfs_reset_adev_alloc(struct mpfs_clock_data *clk_data)
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{
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struct auxiliary_device *adev;
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int ret;
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adev = kzalloc(sizeof(*adev), GFP_KERNEL);
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if (!adev)
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return ERR_PTR(-ENOMEM);
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adev->name = "reset-mpfs";
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adev->dev.parent = clk_data->dev;
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adev->dev.release = mpfs_reset_adev_release;
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adev->id = 666u;
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ret = auxiliary_device_init(adev);
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if (ret) {
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kfree(adev);
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return ERR_PTR(ret);
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}
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return adev;
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}
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static int mpfs_reset_controller_register(struct mpfs_clock_data *clk_data)
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{
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struct auxiliary_device *adev;
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int ret;
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adev = mpfs_reset_adev_alloc(clk_data);
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if (IS_ERR(adev))
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return PTR_ERR(adev);
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ret = auxiliary_device_add(adev);
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if (ret) {
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auxiliary_device_uninit(adev);
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return ret;
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}
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return devm_add_action_or_reset(clk_data->dev, mpfs_reset_unregister_adev, adev);
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}
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#else /* !CONFIG_RESET_CONTROLLER */
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static int mpfs_reset_controller_register(struct mpfs_clock_data *clk_data)
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{
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return 0;
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}
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#endif /* !CONFIG_RESET_CONTROLLER */
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static int mpfs_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@ -499,7 +410,7 @@ static int mpfs_clk_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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return mpfs_reset_controller_register(clk_data);
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return mpfs_reset_controller_register(dev, clk_data->base + REG_SUBBLK_RESET_CR);
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}
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static const struct of_device_id mpfs_clk_of_match_table[] = {
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@ -532,3 +443,4 @@ MODULE_DESCRIPTION("Microchip PolarFire SoC Clock Driver");
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MODULE_AUTHOR("Padmarao Begari <padmarao.begari@microchip.com>");
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MODULE_AUTHOR("Daire McNamara <daire.mcnamara@microchip.com>");
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MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
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MODULE_IMPORT_NS(MCHP_CLK_MPFS);
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@ -8,9 +8,11 @@
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*/
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#include <linux/auxiliary_bus.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/reset-controller.h>
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#include <dt-bindings/clock/microchip,mpfs-clock.h>
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#include <soc/microchip/mpfs.h>
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@ -28,20 +30,30 @@
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/* block concurrent access to the soft reset register */
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static DEFINE_SPINLOCK(mpfs_reset_lock);
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struct mpfs_reset {
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void __iomem *base;
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struct reset_controller_dev rcdev;
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};
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static inline struct mpfs_reset *to_mpfs_reset(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct mpfs_reset, rcdev);
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}
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/*
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* Peripheral clock resets
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*/
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static int mpfs_assert(struct reset_controller_dev *rcdev, unsigned long id)
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{
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struct mpfs_reset *rst = to_mpfs_reset(rcdev);
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&mpfs_reset_lock, flags);
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reg = mpfs_reset_read(rcdev->dev);
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reg = readl(rst->base);
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reg |= BIT(id);
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mpfs_reset_write(rcdev->dev, reg);
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writel(reg, rst->base);
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spin_unlock_irqrestore(&mpfs_reset_lock, flags);
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@ -50,14 +62,15 @@ static int mpfs_assert(struct reset_controller_dev *rcdev, unsigned long id)
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static int mpfs_deassert(struct reset_controller_dev *rcdev, unsigned long id)
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{
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struct mpfs_reset *rst = to_mpfs_reset(rcdev);
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&mpfs_reset_lock, flags);
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reg = mpfs_reset_read(rcdev->dev);
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reg = readl(rst->base);
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reg &= ~BIT(id);
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mpfs_reset_write(rcdev->dev, reg);
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writel(reg, rst->base);
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spin_unlock_irqrestore(&mpfs_reset_lock, flags);
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@ -66,7 +79,8 @@ static int mpfs_deassert(struct reset_controller_dev *rcdev, unsigned long id)
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static int mpfs_status(struct reset_controller_dev *rcdev, unsigned long id)
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{
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u32 reg = mpfs_reset_read(rcdev->dev);
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struct mpfs_reset *rst = to_mpfs_reset(rcdev);
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u32 reg = readl(rst->base);
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/*
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* It is safe to return here as MPFS_NUM_RESETS makes sure the sign bit
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@ -121,11 +135,15 @@ static int mpfs_reset_probe(struct auxiliary_device *adev,
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{
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struct device *dev = &adev->dev;
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struct reset_controller_dev *rcdev;
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struct mpfs_reset *rst;
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rcdev = devm_kzalloc(dev, sizeof(*rcdev), GFP_KERNEL);
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if (!rcdev)
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rst = devm_kzalloc(dev, sizeof(*rst), GFP_KERNEL);
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if (!rst)
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return -ENOMEM;
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rst->base = (void __iomem *)adev->dev.platform_data;
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rcdev = &rst->rcdev;
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rcdev->dev = dev;
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rcdev->dev->parent = dev->parent;
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rcdev->ops = &mpfs_reset_ops;
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@ -137,9 +155,68 @@ static int mpfs_reset_probe(struct auxiliary_device *adev,
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return devm_reset_controller_register(dev, rcdev);
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}
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static void mpfs_reset_unregister_adev(void *_adev)
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{
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struct auxiliary_device *adev = _adev;
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auxiliary_device_delete(adev);
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auxiliary_device_uninit(adev);
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}
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static void mpfs_reset_adev_release(struct device *dev)
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{
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struct auxiliary_device *adev = to_auxiliary_dev(dev);
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kfree(adev);
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}
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static struct auxiliary_device *mpfs_reset_adev_alloc(struct device *clk_dev)
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{
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struct auxiliary_device *adev;
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int ret;
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adev = kzalloc(sizeof(*adev), GFP_KERNEL);
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if (!adev)
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return ERR_PTR(-ENOMEM);
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adev->name = "reset-mpfs";
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adev->dev.parent = clk_dev;
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adev->dev.release = mpfs_reset_adev_release;
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adev->id = 666u;
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ret = auxiliary_device_init(adev);
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if (ret) {
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kfree(adev);
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return ERR_PTR(ret);
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}
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return adev;
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}
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int mpfs_reset_controller_register(struct device *clk_dev, void __iomem *base)
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{
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struct auxiliary_device *adev;
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int ret;
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adev = mpfs_reset_adev_alloc(clk_dev);
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if (IS_ERR(adev))
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return PTR_ERR(adev);
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ret = auxiliary_device_add(adev);
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if (ret) {
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auxiliary_device_uninit(adev);
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return ret;
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}
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adev->dev.platform_data = (__force void *)base;
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return devm_add_action_or_reset(clk_dev, mpfs_reset_unregister_adev, adev);
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}
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EXPORT_SYMBOL_NS_GPL(mpfs_reset_controller_register, MCHP_CLK_MPFS);
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static const struct auxiliary_device_id mpfs_reset_ids[] = {
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{
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.name = "clk_mpfs.reset-mpfs",
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.name = "reset_mpfs.reset-mpfs",
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},
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{ }
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};
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@ -43,11 +43,11 @@ struct mtd_info *mpfs_sys_controller_get_flash(struct mpfs_sys_controller *mpfs_
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#endif /* if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) */
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#if IS_ENABLED(CONFIG_MCHP_CLK_MPFS)
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u32 mpfs_reset_read(struct device *dev);
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void mpfs_reset_write(struct device *dev, u32 val);
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#if IS_ENABLED(CONFIG_RESET_CONTROLLER)
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int mpfs_reset_controller_register(struct device *clk_dev, void __iomem *base);
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#else
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static inline int mpfs_reset_controller_register(struct device *clk_dev, void __iomem *base) { return 0; }
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#endif /* if IS_ENABLED(CONFIG_RESET_CONTROLLER) */
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#endif /* if IS_ENABLED(CONFIG_MCHP_CLK_MPFS) */
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#endif /* __SOC_MPFS_H__ */
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