sh: Switch HD64461 from hw_interrupt_type to irq_chip
Use struct irq_chip for the interrupt handler for the HD64461. Also
convert some in{b,w} and out{b,w} calls to the equivalent __raw_* calls.
Include <linux/io.h> and not <asm/io.h> to stop checkpatch.pl
complaining.
This change should now allow machines with HD64461 to define
GENERIC_HARDIRQS_NO__DO_IRQ.
Acked-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Matt Fleming <mjf@gentoo.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Matt Fleming
Paul Mundt
parent
331ff103c7
commit
135210b378
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@ -10,99 +10,49 @@
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/hd64461.h>
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/* This belongs in cpu specific */
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#define INTC_ICR1 0xA4140010UL
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static void disable_hd64461_irq(unsigned int irq)
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static void hd64461_mask_irq(unsigned int irq)
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{
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unsigned short nimr;
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unsigned short mask = 1 << (irq - HD64461_IRQBASE);
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nimr = inw(HD64461_NIMR);
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nimr = __raw_readw(HD64461_NIMR);
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nimr |= mask;
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outw(nimr, HD64461_NIMR);
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__raw_writew(nimr, HD64461_NIMR);
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}
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static void enable_hd64461_irq(unsigned int irq)
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static void hd64461_unmask_irq(unsigned int irq)
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{
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unsigned short nimr;
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unsigned short mask = 1 << (irq - HD64461_IRQBASE);
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nimr = inw(HD64461_NIMR);
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nimr = __raw_readw(HD64461_NIMR);
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nimr &= ~mask;
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outw(nimr, HD64461_NIMR);
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__raw_writew(nimr, HD64461_NIMR);
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}
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static void mask_and_ack_hd64461(unsigned int irq)
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static void hd64461_mask_and_ack_irq(unsigned int irq)
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{
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disable_hd64461_irq(irq);
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hd64461_mask_irq(irq);
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#ifdef CONFIG_HD64461_ENABLER
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if (irq == HD64461_IRQBASE + 13)
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outb(0x00, HD64461_PCC1CSCR);
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__raw_writeb(0x00, HD64461_PCC1CSCR);
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#endif
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}
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static void end_hd64461_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_hd64461_irq(irq);
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}
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static unsigned int startup_hd64461_irq(unsigned int irq)
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{
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enable_hd64461_irq(irq);
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return 0;
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}
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static void shutdown_hd64461_irq(unsigned int irq)
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{
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disable_hd64461_irq(irq);
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}
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static struct hw_interrupt_type hd64461_irq_type = {
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.typename = "HD64461-IRQ",
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.startup = startup_hd64461_irq,
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.shutdown = shutdown_hd64461_irq,
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.enable = enable_hd64461_irq,
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.disable = disable_hd64461_irq,
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.ack = mask_and_ack_hd64461,
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.end = end_hd64461_irq,
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static struct irq_chip hd64461_irq_chip = {
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.name = "HD64461-IRQ",
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.mask = hd64461_mask_irq,
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.mask_ack = hd64461_mask_and_ack_irq,
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.unmask = hd64461_unmask_irq,
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};
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static irqreturn_t hd64461_interrupt(int irq, void *dev_id)
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{
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printk(KERN_INFO
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"HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
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inw(HD64461_NIRR), inw(HD64461_NIMR));
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return IRQ_NONE;
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}
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static struct {
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int (*func) (int, void *);
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void *dev;
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} hd64461_demux[HD64461_IRQ_NUM];
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void hd64461_register_irq_demux(int irq,
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int (*demux) (int irq, void *dev), void *dev)
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{
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hd64461_demux[irq - HD64461_IRQBASE].func = demux;
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hd64461_demux[irq - HD64461_IRQBASE].dev = dev;
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}
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EXPORT_SYMBOL(hd64461_register_irq_demux);
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void hd64461_unregister_irq_demux(int irq)
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{
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hd64461_demux[irq - HD64461_IRQBASE].func = 0;
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}
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EXPORT_SYMBOL(hd64461_unregister_irq_demux);
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int hd64461_irq_demux(int irq)
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{
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if (irq == CONFIG_HD64461_IRQ) {
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@ -115,25 +65,11 @@ int hd64461_irq_demux(int irq)
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for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
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if (nirr & bit)
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break;
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if (i == 16)
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irq = CONFIG_HD64461_IRQ;
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else {
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irq = HD64461_IRQBASE + i;
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if (hd64461_demux[i].func != 0) {
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irq = hd64461_demux[i].func(irq, hd64461_demux[i].dev);
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}
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}
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irq = HD64461_IRQBASE + i;
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}
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return irq;
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}
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static struct irqaction irq0 = {
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.handler = hd64461_interrupt,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "HD64461",
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};
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int __init setup_hd64461(void)
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{
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int i;
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@ -146,22 +82,21 @@ int __init setup_hd64461(void)
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CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
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HD64461_IRQBASE + 15);
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#if defined(CONFIG_CPU_SUBTYPE_SH7709) /* Should be at processor specific part.. */
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outw(0x2240, INTC_ICR1);
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/* Should be at processor specific part.. */
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#if defined(CONFIG_CPU_SUBTYPE_SH7709)
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__raw_writew(0x2240, INTC_ICR1);
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#endif
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outw(0xffff, HD64461_NIMR);
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__raw_writew(0xffff, HD64461_NIMR);
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/* IRQ 80 -> 95 belongs to HD64461 */
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for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
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irq_desc[i].chip = &hd64461_irq_type;
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}
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setup_irq(CONFIG_HD64461_IRQ, &irq0);
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for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
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set_irq_chip_and_handler(i, &hd64461_irq_chip,
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handle_level_irq);
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#ifdef CONFIG_HD64461_ENABLER
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printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
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outb(0x4c, HD64461_PCC1CSCIER);
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outb(0x00, HD64461_PCC1CSCR);
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__raw_writeb(0x4c, HD64461_PCC1CSCIER);
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__raw_writeb(0x00, HD64461_PCC1CSCR);
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#endif
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return 0;
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