Merge tag 'loongarch-kvm-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson into HEAD
LoongArch KVM changes for v6.10 1. Add ParaVirt IPI support. 2. Add software breakpoint support. 3. Add mmio trace events support.
This commit is contained in:
Paolo Bonzini
commit
4232da23d7
17
.mailmap
17
.mailmap
|
|
@ -38,6 +38,16 @@ Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
|
|||
Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
Alexey Makhalov <alexey.amakhalov@broadcom.com> <amakhalov@vmware.com>
|
||||
Alex Elder <elder@kernel.org>
|
||||
Alex Elder <elder@kernel.org> <aelder@sgi.com>
|
||||
Alex Elder <elder@kernel.org> <alex.elder@linaro.org>
|
||||
Alex Elder <elder@kernel.org> <alex.elder@linary.org>
|
||||
Alex Elder <elder@kernel.org> <elder@dreamhost.com>
|
||||
Alex Elder <elder@kernel.org> <elder@dreawmhost.com>
|
||||
Alex Elder <elder@kernel.org> <elder@ieee.org>
|
||||
Alex Elder <elder@kernel.org> <elder@inktank.com>
|
||||
Alex Elder <elder@kernel.org> <elder@linaro.org>
|
||||
Alex Elder <elder@kernel.org> <elder@newdream.net>
|
||||
Alex Hung <alexhung@gmail.com> <alex.hung@canonical.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@intel.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linaro.org>
|
||||
|
|
@ -98,6 +108,8 @@ Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
|
|||
Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
|
||||
Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de>
|
||||
Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com>
|
||||
Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
|
||||
|
|
@ -446,7 +458,8 @@ Mythri P K <mythripk@ti.com>
|
|||
Nadav Amit <nadav.amit@gmail.com> <namit@vmware.com>
|
||||
Nadav Amit <nadav.amit@gmail.com> <namit@cs.technion.ac.il>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Naoya Horiguchi <naoya.horiguchi@nec.com> <n-horiguchi@ah.jp.nec.com>
|
||||
Naoya Horiguchi <nao.horiguchi@gmail.com> <n-horiguchi@ah.jp.nec.com>
|
||||
Naoya Horiguchi <nao.horiguchi@gmail.com> <naoya.horiguchi@nec.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
|
|
@ -499,6 +512,7 @@ Praveen BP <praveenbp@ti.com>
|
|||
Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> <pradeepc@codeaurora.org>
|
||||
Prasad Sodagudi <quic_psodagud@quicinc.com> <psodagud@codeaurora.org>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
Puranjay Mohan <puranjay@kernel.org> <puranjay12@gmail.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@imgtec.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com>
|
||||
Quentin Monnet <qmo@kernel.org> <quentin.monnet@netronome.com>
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||||
|
|
@ -524,6 +538,7 @@ Rémi Denis-Courmont <rdenis@simphalempin.com>
|
|||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
|
||||
Richard Genoud <richard.genoud@bootlin.com> <richard.genoud@gmail.com>
|
||||
Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
|
|
|
|||
4
CREDITS
4
CREDITS
|
|
@ -3146,6 +3146,10 @@ S: Triftstra=DFe 55
|
|||
S: 13353 Berlin
|
||||
S: Germany
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||||
|
||||
N: Gustavo Pimental
|
||||
E: gustavo.pimentel@synopsys.com
|
||||
D: PCI driver for Synopsys DesignWare
|
||||
|
||||
N: Emanuel Pirker
|
||||
E: epirker@edu.uni-klu.ac.at
|
||||
D: AIC5800 IEEE 1394, RAW I/O on 1394
|
||||
|
|
|
|||
|
|
@ -138,11 +138,10 @@ associated with the source address of the indirect branch. Specifically,
|
|||
the BHB might be shared across privilege levels even in the presence of
|
||||
Enhanced IBRS.
|
||||
|
||||
Currently the only known real-world BHB attack vector is via
|
||||
unprivileged eBPF. Therefore, it's highly recommended to not enable
|
||||
unprivileged eBPF, especially when eIBRS is used (without retpolines).
|
||||
For a full mitigation against BHB attacks, it's recommended to use
|
||||
retpolines (or eIBRS combined with retpolines).
|
||||
Previously the only known real-world BHB attack vector was via unprivileged
|
||||
eBPF. Further research has found attacks that don't require unprivileged eBPF.
|
||||
For a full mitigation against BHB attacks it is recommended to set BHI_DIS_S or
|
||||
use the BHB clearing sequence.
|
||||
|
||||
Attack scenarios
|
||||
----------------
|
||||
|
|
@ -430,6 +429,23 @@ The possible values in this file are:
|
|||
'PBRSB-eIBRS: Not affected' CPU is not affected by PBRSB
|
||||
=========================== =======================================================
|
||||
|
||||
- Branch History Injection (BHI) protection status:
|
||||
|
||||
.. list-table::
|
||||
|
||||
* - BHI: Not affected
|
||||
- System is not affected
|
||||
* - BHI: Retpoline
|
||||
- System is protected by retpoline
|
||||
* - BHI: BHI_DIS_S
|
||||
- System is protected by BHI_DIS_S
|
||||
* - BHI: SW loop, KVM SW loop
|
||||
- System is protected by software clearing sequence
|
||||
* - BHI: Vulnerable
|
||||
- System is vulnerable to BHI
|
||||
* - BHI: Vulnerable, KVM: SW loop
|
||||
- System is vulnerable; KVM is protected by software clearing sequence
|
||||
|
||||
Full mitigation might require a microcode update from the CPU
|
||||
vendor. When the necessary microcode is not available, the kernel will
|
||||
report vulnerability.
|
||||
|
|
@ -484,7 +500,11 @@ Spectre variant 2
|
|||
|
||||
Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at
|
||||
boot, by setting the IBRS bit, and they're automatically protected against
|
||||
Spectre v2 variant attacks.
|
||||
some Spectre v2 variant attacks. The BHB can still influence the choice of
|
||||
indirect branch predictor entry, and although branch predictor entries are
|
||||
isolated between modes when eIBRS is enabled, the BHB itself is not isolated
|
||||
between modes. Systems which support BHI_DIS_S will set it to protect against
|
||||
BHI attacks.
|
||||
|
||||
On Intel's enhanced IBRS systems, this includes cross-thread branch target
|
||||
injections on SMT systems (STIBP). In other words, Intel eIBRS enables
|
||||
|
|
@ -638,6 +658,18 @@ kernel command line.
|
|||
spectre_v2=off. Spectre variant 1 mitigations
|
||||
cannot be disabled.
|
||||
|
||||
spectre_bhi=
|
||||
|
||||
[X86] Control mitigation of Branch History Injection
|
||||
(BHI) vulnerability. This setting affects the deployment
|
||||
of the HW BHI control and the SW BHB clearing sequence.
|
||||
|
||||
on
|
||||
(default) Enable the HW or SW mitigation as
|
||||
needed.
|
||||
off
|
||||
Disable the mitigation.
|
||||
|
||||
For spectre_v2_user see Documentation/admin-guide/kernel-parameters.txt
|
||||
|
||||
Mitigation selection guide
|
||||
|
|
|
|||
|
|
@ -3423,6 +3423,9 @@
|
|||
arch-independent options, each of which is an
|
||||
aggregation of existing arch-specific options.
|
||||
|
||||
Note, "mitigations" is supported if and only if the
|
||||
kernel was built with CPU_MITIGATIONS=y.
|
||||
|
||||
off
|
||||
Disable all optional CPU mitigations. This
|
||||
improves system performance, but it may also
|
||||
|
|
@ -3444,6 +3447,7 @@
|
|||
retbleed=off [X86]
|
||||
spec_rstack_overflow=off [X86]
|
||||
spec_store_bypass_disable=off [X86,PPC]
|
||||
spectre_bhi=off [X86]
|
||||
spectre_v2_user=off [X86]
|
||||
srbds=off [X86,INTEL]
|
||||
ssbd=force-off [ARM64]
|
||||
|
|
@ -6063,6 +6067,15 @@
|
|||
sonypi.*= [HW] Sony Programmable I/O Control Device driver
|
||||
See Documentation/admin-guide/laptops/sonypi.rst
|
||||
|
||||
spectre_bhi= [X86] Control mitigation of Branch History Injection
|
||||
(BHI) vulnerability. This setting affects the
|
||||
deployment of the HW BHI control and the SW BHB
|
||||
clearing sequence.
|
||||
|
||||
on - (default) Enable the HW or SW mitigation
|
||||
as needed.
|
||||
off - Disable the mitigation.
|
||||
|
||||
spectre_v2= [X86,EARLY] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability.
|
||||
The default operation protects the kernel from
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -671,7 +671,7 @@ configuration, worker pools and how workqueues map to the pools: ::
|
|||
events_unbound unbound 9 9 10 10 8
|
||||
events_freezable percpu 0 2 4 6
|
||||
events_power_efficient percpu 0 2 4 6
|
||||
events_freezable_power_ percpu 0 2 4 6
|
||||
events_freezable_pwr_ef percpu 0 2 4 6
|
||||
rcu_gp percpu 0 2 4 6
|
||||
rcu_par_gp percpu 0 2 4 6
|
||||
slub_flushwq percpu 0 2 4 6
|
||||
|
|
@ -694,7 +694,7 @@ Use tools/workqueue/wq_monitor.py to monitor workqueue operations: ::
|
|||
events_unbound 38306 0 0.1 - 7 - -
|
||||
events_freezable 0 0 0.0 0 0 - -
|
||||
events_power_efficient 29598 0 0.2 0 0 - -
|
||||
events_freezable_power_ 10 0 0.0 0 0 - -
|
||||
events_freezable_pwr_ef 10 0 0.0 0 0 - -
|
||||
sock_diag_events 0 0 0.0 0 0 - -
|
||||
|
||||
total infl CPUtime CPUhog CMW/RPR mayday rescued
|
||||
|
|
@ -704,7 +704,7 @@ Use tools/workqueue/wq_monitor.py to monitor workqueue operations: ::
|
|||
events_unbound 38322 0 0.1 - 7 - -
|
||||
events_freezable 0 0 0.0 0 0 - -
|
||||
events_power_efficient 29603 0 0.2 0 0 - -
|
||||
events_freezable_power_ 10 0 0.0 0 0 - -
|
||||
events_freezable_pwr_ef 10 0 0.0 0 0 - -
|
||||
sock_diag_events 0 0 0.0 0 0 - -
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -53,6 +53,15 @@ patternProperties:
|
|||
compatible:
|
||||
const: qcom,sm8150-dpu
|
||||
|
||||
"^displayport-controller@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,sm8150-dp
|
||||
|
||||
"^dsi@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
|
|
|
|||
|
|
@ -68,14 +68,10 @@ properties:
|
|||
pattern: cs16$
|
||||
- items:
|
||||
pattern: c32$
|
||||
- items:
|
||||
pattern: c32d-wl$
|
||||
- items:
|
||||
pattern: cs32$
|
||||
- items:
|
||||
pattern: c64$
|
||||
- items:
|
||||
pattern: c64d-wl$
|
||||
- items:
|
||||
pattern: cs64$
|
||||
- items:
|
||||
|
|
@ -136,6 +132,7 @@ properties:
|
|||
- renesas,r1ex24128
|
||||
- samsung,s524ad0xd1
|
||||
- const: atmel,24c128
|
||||
- pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
|
||||
|
||||
label:
|
||||
description: Descriptive name of the EEPROM.
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: maxim,max30100
|
||||
const: maxim,max30102
|
||||
then:
|
||||
properties:
|
||||
maxim,green-led-current-microamp: false
|
||||
|
|
|
|||
|
|
@ -120,7 +120,9 @@ additionalProperties:
|
|||
slew-rate: true
|
||||
gpio-hog: true
|
||||
gpios: true
|
||||
input: true
|
||||
input-enable: true
|
||||
output-enable: true
|
||||
output-high: true
|
||||
output-low: true
|
||||
line-name: true
|
||||
|
|
|
|||
|
|
@ -52,6 +52,9 @@ properties:
|
|||
- const: main
|
||||
- const: mm
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
|
||||
|
||||
maintainers:
|
||||
- Richard Genoud <richard.genoud@gmail.com>
|
||||
- Richard Genoud <richard.genoud@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -171,6 +171,7 @@ allOf:
|
|||
unevaluatedProperties: false
|
||||
|
||||
pcie-phy:
|
||||
type: object
|
||||
description:
|
||||
Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
|
||||
|
||||
|
|
|
|||
|
|
@ -20,6 +20,11 @@ Optional properties:
|
|||
a GPIO spec for the external headphone detect pin. If jd-mode = 0,
|
||||
we will get the JD status by getting the value of hp-detect-gpios.
|
||||
|
||||
- cbj-sleeve-gpios:
|
||||
a GPIO spec to control the external combo jack circuit to tie the sleeve/ring2
|
||||
contacts to the ground or floating. It could avoid some electric noise from the
|
||||
active speaker jacks.
|
||||
|
||||
- realtek,in2-differential
|
||||
Boolean. Indicate MIC2 input are differential, rather than single-ended.
|
||||
|
||||
|
|
@ -68,6 +73,7 @@ codec: rt5650@1a {
|
|||
compatible = "realtek,rt5650";
|
||||
reg = <0x1a>;
|
||||
hp-detect-gpios = <&gpio 19 0>;
|
||||
cbj-sleeve-gpios = <&gpio 20 0>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
|
||||
realtek,dmic-en = "true";
|
||||
|
|
|
|||
|
|
@ -97,7 +97,6 @@ like this::
|
|||
|
||||
static struct virtio_driver virtio_dummy_driver = {
|
||||
.driver.name = KBUILD_MODNAME,
|
||||
.driver.owner = THIS_MODULE,
|
||||
.id_table = id_table,
|
||||
.probe = virtio_dummy_probe,
|
||||
.remove = virtio_dummy_remove,
|
||||
|
|
|
|||
|
|
@ -0,0 +1,11 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
======================
|
||||
bcachefs Documentation
|
||||
======================
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
:numbered:
|
||||
|
||||
errorcodes
|
||||
|
|
@ -69,6 +69,7 @@ Documentation for filesystem implementations.
|
|||
afs
|
||||
autofs
|
||||
autofs-mount-control
|
||||
bcachefs/index
|
||||
befs
|
||||
bfs
|
||||
btrfs
|
||||
|
|
|
|||
|
|
@ -24,10 +24,10 @@ fragmentation statistics can be obtained through gfp flag information of
|
|||
each page. It is already implemented and activated if page owner is
|
||||
enabled. Other usages are more than welcome.
|
||||
|
||||
It can also be used to show all the stacks and their outstanding
|
||||
allocations, which gives us a quick overview of where the memory is going
|
||||
without the need to screen through all the pages and match the allocation
|
||||
and free operation.
|
||||
It can also be used to show all the stacks and their current number of
|
||||
allocated base pages, which gives us a quick overview of where the memory
|
||||
is going without the need to screen through all the pages and match the
|
||||
allocation and free operation.
|
||||
|
||||
page owner is disabled by default. So, if you'd like to use it, you need
|
||||
to add "page_owner=on" to your boot cmdline. If the kernel is built
|
||||
|
|
@ -75,42 +75,45 @@ Usage
|
|||
|
||||
cat /sys/kernel/debug/page_owner_stacks/show_stacks > stacks.txt
|
||||
cat stacks.txt
|
||||
prep_new_page+0xa9/0x120
|
||||
get_page_from_freelist+0x7e6/0x2140
|
||||
__alloc_pages+0x18a/0x370
|
||||
new_slab+0xc8/0x580
|
||||
___slab_alloc+0x1f2/0xaf0
|
||||
__slab_alloc.isra.86+0x22/0x40
|
||||
kmem_cache_alloc+0x31b/0x350
|
||||
__khugepaged_enter+0x39/0x100
|
||||
dup_mmap+0x1c7/0x5ce
|
||||
copy_process+0x1afe/0x1c90
|
||||
kernel_clone+0x9a/0x3c0
|
||||
__do_sys_clone+0x66/0x90
|
||||
do_syscall_64+0x7f/0x160
|
||||
entry_SYSCALL_64_after_hwframe+0x6c/0x74
|
||||
stack_count: 234
|
||||
post_alloc_hook+0x177/0x1a0
|
||||
get_page_from_freelist+0xd01/0xd80
|
||||
__alloc_pages+0x39e/0x7e0
|
||||
allocate_slab+0xbc/0x3f0
|
||||
___slab_alloc+0x528/0x8a0
|
||||
kmem_cache_alloc+0x224/0x3b0
|
||||
sk_prot_alloc+0x58/0x1a0
|
||||
sk_alloc+0x32/0x4f0
|
||||
inet_create+0x427/0xb50
|
||||
__sock_create+0x2e4/0x650
|
||||
inet_ctl_sock_create+0x30/0x180
|
||||
igmp_net_init+0xc1/0x130
|
||||
ops_init+0x167/0x410
|
||||
setup_net+0x304/0xa60
|
||||
copy_net_ns+0x29b/0x4a0
|
||||
create_new_namespaces+0x4a1/0x820
|
||||
nr_base_pages: 16
|
||||
...
|
||||
...
|
||||
echo 7000 > /sys/kernel/debug/page_owner_stacks/count_threshold
|
||||
cat /sys/kernel/debug/page_owner_stacks/show_stacks> stacks_7000.txt
|
||||
cat stacks_7000.txt
|
||||
prep_new_page+0xa9/0x120
|
||||
get_page_from_freelist+0x7e6/0x2140
|
||||
__alloc_pages+0x18a/0x370
|
||||
alloc_pages_mpol+0xdf/0x1e0
|
||||
folio_alloc+0x14/0x50
|
||||
filemap_alloc_folio+0xb0/0x100
|
||||
page_cache_ra_unbounded+0x97/0x180
|
||||
filemap_fault+0x4b4/0x1200
|
||||
__do_fault+0x2d/0x110
|
||||
do_pte_missing+0x4b0/0xa30
|
||||
__handle_mm_fault+0x7fa/0xb70
|
||||
handle_mm_fault+0x125/0x300
|
||||
do_user_addr_fault+0x3c9/0x840
|
||||
exc_page_fault+0x68/0x150
|
||||
asm_exc_page_fault+0x22/0x30
|
||||
stack_count: 8248
|
||||
post_alloc_hook+0x177/0x1a0
|
||||
get_page_from_freelist+0xd01/0xd80
|
||||
__alloc_pages+0x39e/0x7e0
|
||||
alloc_pages_mpol+0x22e/0x490
|
||||
folio_alloc+0xd5/0x110
|
||||
filemap_alloc_folio+0x78/0x230
|
||||
page_cache_ra_order+0x287/0x6f0
|
||||
filemap_get_pages+0x517/0x1160
|
||||
filemap_read+0x304/0x9f0
|
||||
xfs_file_buffered_read+0xe6/0x1d0 [xfs]
|
||||
xfs_file_read_iter+0x1f0/0x380 [xfs]
|
||||
__kernel_read+0x3b9/0x730
|
||||
kernel_read_file+0x309/0x4d0
|
||||
__do_sys_finit_module+0x381/0x730
|
||||
do_syscall_64+0x8d/0x150
|
||||
entry_SYSCALL_64_after_hwframe+0x62/0x6a
|
||||
nr_base_pages: 20824
|
||||
...
|
||||
|
||||
cat /sys/kernel/debug/page_owner > page_owner_full.txt
|
||||
|
|
|
|||
|
|
@ -252,7 +252,7 @@ an involved disclosed party. The current ambassadors list:
|
|||
AMD Tom Lendacky <thomas.lendacky@amd.com>
|
||||
Ampere Darren Hart <darren@os.amperecomputing.com>
|
||||
ARM Catalin Marinas <catalin.marinas@arm.com>
|
||||
IBM Power Anton Blanchard <anton@linux.ibm.com>
|
||||
IBM Power Michael Ellerman <ellerman@au.ibm.com>
|
||||
IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
|
||||
Intel Tony Luck <tony.luck@intel.com>
|
||||
Qualcomm Trilok Soni <quic_tsoni@quicinc.com>
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file.
|
|||
Architecture Level of support Constraints
|
||||
============= ================ ==============================================
|
||||
``arm64`` Maintained Little Endian only.
|
||||
``loongarch`` Maintained -
|
||||
``loongarch`` Maintained \-
|
||||
``um`` Maintained ``x86_64`` only.
|
||||
``x86`` Maintained ``x86_64`` only.
|
||||
============= ================ ==============================================
|
||||
|
|
|
|||
|
|
@ -129,11 +129,8 @@ adaptive-tick CPUs: At least one non-adaptive-tick CPU must remain
|
|||
online to handle timekeeping tasks in order to ensure that system
|
||||
calls like gettimeofday() returns accurate values on adaptive-tick CPUs.
|
||||
(This is not an issue for CONFIG_NO_HZ_IDLE=y because there are no running
|
||||
user processes to observe slight drifts in clock rate.) Therefore, the
|
||||
boot CPU is prohibited from entering adaptive-ticks mode. Specifying a
|
||||
"nohz_full=" mask that includes the boot CPU will result in a boot-time
|
||||
error message, and the boot CPU will be removed from the mask. Note that
|
||||
this means that your system must have at least two CPUs in order for
|
||||
user processes to observe slight drifts in clock rate.) Note that this
|
||||
means that your system must have at least two CPUs in order for
|
||||
CONFIG_NO_HZ_FULL=y to do anything for you.
|
||||
|
||||
Finally, adaptive-ticks CPUs must have their RCU callbacks offloaded.
|
||||
|
|
|
|||
|
|
@ -7,12 +7,13 @@
|
|||
|
||||
司延腾 Yanteng Si <siyanteng@loongson.cn>
|
||||
周彬彬 Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
陈兴友 Xingyou Chen <rockrush@rockwork.org>
|
||||
|
||||
.. _cn_workqueue.rst:
|
||||
|
||||
=========================
|
||||
并发管理的工作队列 (cmwq)
|
||||
=========================
|
||||
========
|
||||
工作队列
|
||||
========
|
||||
|
||||
:日期: September, 2010
|
||||
:作者: Tejun Heo <tj@kernel.org>
|
||||
|
|
@ -22,7 +23,7 @@
|
|||
简介
|
||||
====
|
||||
|
||||
在很多情况下，需要一个异步进程的执行环境，工作队列（wq）API是这种情况下
|
||||
在很多情况下，需要一个异步的程序执行环境，工作队列（wq）API是这种情况下
|
||||
最常用的机制。
|
||||
|
||||
当需要这样一个异步执行上下文时，一个描述将要执行的函数的工作项（work，
|
||||
|
|
@ -34,8 +35,8 @@
|
|||
队列时，工作者又开始执行。
|
||||
|
||||
|
||||
为什么要cmwq?
|
||||
=============
|
||||
为什么要有并发管理工作队列?
|
||||
===========================
|
||||
|
||||
在最初的wq实现中，多线程（MT）wq在每个CPU上有一个工作者线程，而单线程
|
||||
（ST）wq在全系统有一个工作者线程。一个MT wq需要保持与CPU数量相同的工
|
||||
|
|
@ -73,9 +74,11 @@
|
|||
向该函数的工作项，并在工作队列中排队等待该工作项。（就是挂到workqueue
|
||||
队列里面去）
|
||||
|
||||
特定目的线程，称为工作线程（工作者），一个接一个地执行队列中的功能。
|
||||
如果没有工作项排队，工作者线程就会闲置。这些工作者线程被管理在所谓
|
||||
的工作者池中。
|
||||
工作项可以在线程或BH(软中断)上下文中执行。
|
||||
|
||||
对于由线程执行的工作队列，被称为（内核）工作者（[k]worker）的特殊
|
||||
线程会依次执行其中的函数。如果没有工作项排队，工作者线程就会闲置。
|
||||
这些工作者线程被管理在所谓的工作者池中。
|
||||
|
||||
cmwq设计区分了面向用户的工作队列，子系统和驱动程序在上面排队工作，
|
||||
以及管理工作者池和处理排队工作项的后端机制。
|
||||
|
|
@ -84,6 +87,10 @@ cmwq设计区分了面向用户的工作队列，子系统和驱动程序在上
|
|||
优先级的工作项，还有一些额外的工作者池，用于服务未绑定工作队列的工
|
||||
作项目——这些后备池的数量是动态的。
|
||||
|
||||
BH工作队列使用相同的结构。然而，由于同一时间只可能有一个执行上下文，
|
||||
不需要担心并发问题。每个CPU上的BH工作者池只包含一个用于表示BH执行
|
||||
上下文的虚拟工作者。BH工作队列可以被看作软中断的便捷接口。
|
||||
|
||||
当他们认为合适的时候，子系统和驱动程序可以通过特殊的
|
||||
``workqueue API`` 函数创建和排队工作项。他们可以通过在工作队列上
|
||||
设置标志来影响工作项执行方式的某些方面，他们把工作项放在那里。这些
|
||||
|
|
@ -95,9 +102,9 @@ cmwq设计区分了面向用户的工作队列，子系统和驱动程序在上
|
|||
否则一个绑定的工作队列的工作项将被排在与发起线程运行的CPU相关的普
|
||||
通或高级工作工作者池的工作项列表中。
|
||||
|
||||
对于任何工作者池的实施，管理并发水平（有多少执行上下文处于活动状
|
||||
态）是一个重要问题。最低水平是为了节省资源，而饱和水平是指系统被
|
||||
充分使用。
|
||||
对于任何线程池的实施，管理并发水平（有多少执行上下文处于活动状
|
||||
态）是一个重要问题。cmwq试图将并发保持在一个尽可能低且充足的
|
||||
水平。最低水平是为了节省资源，而充足是为了使系统能被充分使用。
|
||||
|
||||
每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
|
||||
一个活动的工作者被唤醒或睡眠时，工作者池就会得到通知，并跟踪当前可
|
||||
|
|
@ -140,6 +147,17 @@ workqueue将自动创建与属性相匹配的后备工作者池。调节并发
|
|||
``flags``
|
||||
---------
|
||||
|
||||
``WQ_BH``
|
||||
BH工作队列可以被看作软中断的便捷接口。它总是每个CPU一份，
|
||||
其中的各个工作项也会按在队列中的顺序，被所属CPU在软中断
|
||||
上下文中执行。
|
||||
|
||||
BH工作队列的 ``max_active`` 值必须为0，且只能单独或和
|
||||
``WQ_HIGHPRI`` 标志组合使用。
|
||||
|
||||
BH工作项不可以睡眠。像延迟排队、冲洗、取消等所有其他特性
|
||||
都是支持的。
|
||||
|
||||
``WQ_UNBOUND``
|
||||
排队到非绑定wq的工作项由特殊的工作者池提供服务，这些工作者不
|
||||
绑定在任何特定的CPU上。这使得wq表现得像一个简单的执行环境提
|
||||
|
|
@ -184,25 +202,21 @@ workqueue将自动创建与属性相匹配的后备工作者池。调节并发
|
|||
--------------
|
||||
|
||||
``@max_active`` 决定了每个CPU可以分配给wq的工作项的最大执行上
|
||||
下文数量。例如，如果 ``@max_active为16`` ，每个CPU最多可以同
|
||||
时执行16个wq的工作项。
|
||||
下文数量。例如，如果 ``@max_active`` 为16 ，每个CPU最多可以同
|
||||
时执行16个wq的工作项。它总是每CPU属性，即便对于未绑定 wq。
|
||||
|
||||
目前，对于一个绑定的wq， ``@max_active`` 的最大限制是512，当指
|
||||
定为0时使用的默认值是256。对于非绑定的wq，其限制是512和
|
||||
4 * ``num_possible_cpus()`` 中的较高值。这些值被选得足够高，所
|
||||
以它们不是限制性因素，同时会在失控情况下提供保护。
|
||||
``@max_active`` 的最大限制是512，当指定为0时使用的默认值是256。
|
||||
这些值被选得足够高，所以它们不是限制性因素，同时会在失控情况下提供
|
||||
保护。
|
||||
|
||||
一个wq的活动工作项的数量通常由wq的用户来调节，更具体地说，是由用
|
||||
户在同一时间可以排列多少个工作项来调节。除非有特定的需求来控制活动
|
||||
工作项的数量，否则建议指定 为"0"。
|
||||
|
||||
一些用户依赖于ST wq的严格执行顺序。 ``@max_active`` 为1和 ``WQ_UNBOUND``
|
||||
的组合用来实现这种行为。这种wq上的工作项目总是被排到未绑定的工作池
|
||||
中，并且在任何时候都只有一个工作项目处于活动状态，从而实现与ST wq相
|
||||
同的排序属性。
|
||||
|
||||
在目前的实现中，上述配置只保证了特定NUMA节点内的ST行为。相反，
|
||||
``alloc_ordered_workqueue()`` 应该被用来实现全系统的ST行为。
|
||||
一些用户依赖于任意时刻最多只有一个工作项被执行，且各工作项被按队列中
|
||||
顺序处理带来的严格执行顺序。``@max_active`` 为1和 ``WQ_UNBOUND``
|
||||
的组合曾被用来实现这种行为，现在不用了。请使用
|
||||
``alloc_ordered_workqueue()`` 。
|
||||
|
||||
|
||||
执行场景示例
|
||||
|
|
@ -285,7 +299,7 @@ And with cmwq with ``@max_active`` >= 3, ::
|
|||
* 除非有特殊需要，建议使用0作为@max_active。在大多数使用情
|
||||
况下，并发水平通常保持在默认限制之下。
|
||||
|
||||
* 一个wq作为前进进度保证（WQ_MEM_RECLAIM，冲洗（flush）和工
|
||||
* 一个wq作为前进进度保证，``WQ_MEM_RECLAIM`` ，冲洗（flush）和工
|
||||
作项属性的域。不涉及内存回收的工作项，不需要作为工作项组的一
|
||||
部分被刷新，也不需要任何特殊属性，可以使用系统中的一个wq。使
|
||||
用专用wq和系统wq在执行特性上没有区别。
|
||||
|
|
@ -294,6 +308,337 @@ And with cmwq with ``@max_active`` >= 3, ::
|
|||
益的，因为wq操作和工作项执行中的定位水平提高了。
|
||||
|
||||
|
||||
亲和性作用域
|
||||
============
|
||||
|
||||
一个非绑定工作队列根据其亲和性作用域来对CPU进行分组以提高缓存
|
||||
局部性。比如如果一个工作队列使用默认的“cache”亲和性作用域，
|
||||
它将根据最后一级缓存的边界来分组处理器。这个工作队列上的工作项
|
||||
将被分配给一个与发起CPU共用最后级缓存的处理器上的工作者。根据
|
||||
``affinity_strict`` 的设置，工作者在启动后可能被允许移出
|
||||
所在作用域，也可能不被允许。
|
||||
|
||||
工作队列目前支持以下亲和性作用域。
|
||||
|
||||
``default``
|
||||
使用模块参数 ``workqueue.default_affinity_scope`` 指定
|
||||
的作用域，该参数总是会被设为以下作用域中的一个。
|
||||
|
||||
``cpu``
|
||||
CPU不被分组。一个CPU上发起的工作项会被同一CPU上的工作者执行。
|
||||
这使非绑定工作队列表现得像是不含并发管理的每CPU工作队列。
|
||||
|
||||
``smt``
|
||||
CPU被按SMT边界分组。这通常意味着每个物理CPU核上的各逻辑CPU会
|
||||
被分进同一组。
|
||||
|
||||
``cache``
|
||||
CPU被按缓存边界分组。采用哪个缓存边界由架构代码决定。很多情况
|
||||
下会使用L3。这是默认的亲和性作用域。
|
||||
|
||||
``numa``
|
||||
CPU被按NUMA边界分组。
|
||||
|
||||
``system``
|
||||
所有CPU被放在同一组。工作队列不尝试在临近发起CPU的CPU上运行
|
||||
工作项。
|
||||
|
||||
默认的亲和性作用域可以被模块参数 ``workqueue.default_affinity_scope``
|
||||
修改，特定工作队列的亲和性作用域可以通过 ``apply_workqueue_attrs()``
|
||||
被更改。
|
||||
|
||||
如果设置了 ``WQ_SYSFS`` ，工作队列会在它的 ``/sys/devices/virtual/workqueue/WQ_NAME/``
|
||||
目录中有以下亲和性作用域相关的接口文件。
|
||||
|
||||
``affinity_scope``
|
||||
读操作以查看当前的亲和性作用域。写操作用于更改设置。
|
||||
|
||||
当前作用域是默认值时，当前生效的作用域也可以被从这个文件中
|
||||
读到（小括号内），例如 ``default (cache)`` 。
|
||||
|
||||
``affinity_strict``
|
||||
默认值0表明亲和性作用域不是严格的。当一个工作项开始执行时，
|
||||
工作队列尽量尝试使工作者处于亲和性作用域内，称为遣返。启动后，
|
||||
调度器可以自由地将工作者调度到系统中任意它认为合适的地方去。
|
||||
这使得在保留使用其他CPU（如果必需且有可用）能力的同时，
|
||||
还能从作用域局部性上获益。
|
||||
|
||||
如果设置为1，作用域内的所有工作者将被保证总是处于作用域内。
|
||||
这在跨亲和性作用域会导致如功耗、负载隔离等方面的潜在影响时
|
||||
会有用。严格的NUMA作用域也可用于和旧版内核中工作队列的行为
|
||||
保持一致。
|
||||
|
||||
|
||||
亲和性作用域与性能
|
||||
==================
|
||||
|
||||
如果非绑定工作队列的行为对绝大多数使用场景来说都是最优的，
|
||||
不需要更多调节，就完美了。很不幸，在当前内核中，重度使用
|
||||
工作队列时，需要在局部性和利用率间显式地作一个明显的权衡。
|
||||
|
||||
更高的局部性带来更高效率，也就是相同数量的CPU周期内可以做
|
||||
更多工作。然而，如果发起者没能将工作项充分地分散在亲和性
|
||||
作用域间，更高的局部性也可能带来更低的整体系统利用率。以下
|
||||
dm-crypt 的性能测试清楚地阐明了这一取舍。
|
||||
|
||||
测试运行在一个12核24线程、4个L3缓存的处理器（AMD Ryzen
|
||||
9 3900x）上。为保持一致性，关闭CPU超频。 ``/dev/dm-0``
|
||||
是NVME SSD（三星 990 PRO）上创建，用 ``cryptsetup``
|
||||
以默认配置打开的一个 dm-crypt 设备。
|
||||
|
||||
|
||||
场景 1: 机器上遍布着有充足的发起者和工作量
|
||||
------------------------------------------
|
||||
|
||||
使用命令：::
|
||||
|
||||
$ fio --filename=/dev/dm-0 --direct=1 --rw=randrw --bs=32k --ioengine=libaio \
|
||||
--iodepth=64 --runtime=60 --numjobs=24 --time_based --group_reporting \
|
||||
--name=iops-test-job --verify=sha512
|
||||
|
||||
这里有24个发起者，每个同时发起64个IO。 ``--verify=sha512``
|
||||
使得 ``fio`` 每次生成和读回内容受发起者和 ``kcryptd``
|
||||
间的执行局部性影响。下面是基于不同 ``kcryptd`` 的亲和性
|
||||
作用域设置，各经过五次测试得到的读取带宽和CPU利用率数据。
|
||||
|
||||
.. list-table::
|
||||
:widths: 16 20 20
|
||||
:header-rows: 1
|
||||
|
||||
* - 亲和性
|
||||
- 带宽 (MiBps)
|
||||
- CPU利用率（%）
|
||||
|
||||
* - system
|
||||
- 1159.40 ±1.34
|
||||
- 99.31 ±0.02
|
||||
|
||||
* - cache
|
||||
- 1166.40 ±0.89
|
||||
- 99.34 ±0.01
|
||||
|
||||
* - cache (strict)
|
||||
- 1166.00 ±0.71
|
||||
- 99.35 ±0.01
|
||||
|
||||
在系统中分布着足够多发起者的情况下，不论严格与否，“cache”
|
||||
没有表现得更差。三种配置均使整个机器达到饱和，但由于提高了
|
||||
局部性，缓存相关的两种有0.6%的（带宽）提升。
|
||||
|
||||
|
||||
场景 2: 更少发起者，足以达到饱和的工作量
|
||||
----------------------------------------
|
||||
|
||||
使用命令：::
|
||||
|
||||
$ fio --filename=/dev/dm-0 --direct=1 --rw=randrw --bs=32k \
|
||||
--ioengine=libaio --iodepth=64 --runtime=60 --numjobs=8 \
|
||||
--time_based --group_reporting --name=iops-test-job --verify=sha512
|
||||
|
||||
与上一个场景唯一的区别是 ``--numjobs=8``。 发起者数量
|
||||
减少为三分之一，但仍然有足以使系统达到饱和的工作总量。
|
||||
|
||||
.. list-table::
|
||||
:widths: 16 20 20
|
||||
:header-rows: 1
|
||||
|
||||
* - 亲和性
|
||||
- 带宽 (MiBps)
|
||||
- CPU利用率（%）
|
||||
|
||||
* - system
|
||||
- 1155.40 ±0.89
|
||||
- 97.41 ±0.05
|
||||
|
||||
* - cache
|
||||
- 1154.40 ±1.14
|
||||
- 96.15 ±0.09
|
||||
|
||||
* - cache (strict)
|
||||
- 1112.00 ±4.64
|
||||
- 93.26 ±0.35
|
||||
|
||||
这里有超过使系统达到饱和所需的工作量。“system”和“cache”
|
||||
都接近但并未使机器完全饱和。“cache”消耗更少的CPU但更高的
|
||||
效率使其得到和“system”相同的带宽。
|
||||
|
||||
八个发起者盘桓在四个L3缓存作用域间仍然允许“cache (strict)”
|
||||
几乎使机器饱和，但缺少对工作的保持（不移到空闲处理器上）
|
||||
开始带来3.7%的带宽损失。
|
||||
|
||||
|
||||
场景 3: 更少发起者，不充足的工作量
|
||||
----------------------------------
|
||||
|
||||
使用命令：::
|
||||
|
||||
$ fio --filename=/dev/dm-0 --direct=1 --rw=randrw --bs=32k \
|
||||
--ioengine=libaio --iodepth=64 --runtime=60 --numjobs=4 \
|
||||
--time_based --group_reporting --name=iops-test-job --verify=sha512
|
||||
|
||||
再次，唯一的区别是 ``--numjobs=4``。由于发起者减少到四个，
|
||||
现在没有足以使系统饱和的工作量，带宽变得依赖于完成时延。
|
||||
|
||||
.. list-table::
|
||||
:widths: 16 20 20
|
||||
:header-rows: 1
|
||||
|
||||
* - 亲和性
|
||||
- 带宽 (MiBps)
|
||||
- CPU利用率（%）
|
||||
|
||||
* - system
|
||||
- 993.60 ±1.82
|
||||
- 75.49 ±0.06
|
||||
|
||||
* - cache
|
||||
- 973.40 ±1.52
|
||||
- 74.90 ±0.07
|
||||
|
||||
* - cache (strict)
|
||||
- 828.20 ±4.49
|
||||
- 66.84 ±0.29
|
||||
|
||||
现在，局部性和利用率间的权衡更清晰了。“cache”展示出相比
|
||||
“system”2%的带宽损失，而“cache (strict)”跌到20%。
|
||||
|
||||
|
||||
结论和建议
|
||||
----------
|
||||
|
||||
在以上试验中，虽然一致并且也明显，但“cache”亲和性作用域
|
||||
相比“system”的性能优势并不大。然而，这影响是依赖于作用域
|
||||
间距离的，在更复杂的处理器拓扑下可能有更明显的影响。
|
||||
|
||||
虽然这些情形下缺少工作保持是有坏处的，但比“cache (strict)”
|
||||
好多了，而且最大化工作队列利用率的需求也并不常见。因此，
|
||||
“cache”是非绑定池的默认亲和性作用域。
|
||||
|
||||
* 由于不存在一个适用于大多数场景的选择，对于可能需要消耗
|
||||
大量CPU的工作队列，建议通过 ``apply_workqueue_attrs()``
|
||||
进行（专门）配置，并考虑是否启用 ``WQ_SYSFS``。
|
||||
|
||||
* 设置了严格“cpu”亲和性作用域的非绑定工作队列，它的行为与
|
||||
``WQ_CPU_INTENSIVE`` 每CPU工作队列一样。后者没有真正
|
||||
优势，而前者提供了大幅度的灵活性。
|
||||
|
||||
* 亲和性作用域是从Linux v6.5起引入的。为了模拟旧版行为，
|
||||
可以使用严格的“numa”亲和性作用域。
|
||||
|
||||
* 不严格的亲和性作用域中，缺少工作保持大概缘于调度器。内核
|
||||
为什么没能维护好大多数场景下的工作保持，把事情作对，还没有
|
||||
理论上的解释。因此，未来调度器的改进可能会使我们不再需要
|
||||
这些调节项。
|
||||
|
||||
|
||||
检查配置
|
||||
========
|
||||
|
||||
使用 tools/workqueue/wq_dump.py（drgn脚本） 来检查未
|
||||
绑定CPU的亲和性配置，工作者池，以及工作队列如何映射到池上: ::
|
||||
|
||||
$ tools/workqueue/wq_dump.py
|
||||
Affinity Scopes
|
||||
===============
|
||||
wq_unbound_cpumask=0000000f
|
||||
|
||||
CPU
|
||||
nr_pods 4
|
||||
pod_cpus [0]=00000001 [1]=00000002 [2]=00000004 [3]=00000008
|
||||
pod_node [0]=0 [1]=0 [2]=1 [3]=1
|
||||
cpu_pod [0]=0 [1]=1 [2]=2 [3]=3
|
||||
|
||||
SMT
|
||||
nr_pods 4
|
||||
pod_cpus [0]=00000001 [1]=00000002 [2]=00000004 [3]=00000008
|
||||
pod_node [0]=0 [1]=0 [2]=1 [3]=1
|
||||
cpu_pod [0]=0 [1]=1 [2]=2 [3]=3
|
||||
|
||||
CACHE (default)
|
||||
nr_pods 2
|
||||
pod_cpus [0]=00000003 [1]=0000000c
|
||||
pod_node [0]=0 [1]=1
|
||||
cpu_pod [0]=0 [1]=0 [2]=1 [3]=1
|
||||
|
||||
NUMA
|
||||
nr_pods 2
|
||||
pod_cpus [0]=00000003 [1]=0000000c
|
||||
pod_node [0]=0 [1]=1
|
||||
cpu_pod [0]=0 [1]=0 [2]=1 [3]=1
|
||||
|
||||
SYSTEM
|
||||
nr_pods 1
|
||||
pod_cpus [0]=0000000f
|
||||
pod_node [0]=-1
|
||||
cpu_pod [0]=0 [1]=0 [2]=0 [3]=0
|
||||
|
||||
Worker Pools
|
||||
============
|
||||
pool[00] ref= 1 nice= 0 idle/workers= 4/ 4 cpu= 0
|
||||
pool[01] ref= 1 nice=-20 idle/workers= 2/ 2 cpu= 0
|
||||
pool[02] ref= 1 nice= 0 idle/workers= 4/ 4 cpu= 1
|
||||
pool[03] ref= 1 nice=-20 idle/workers= 2/ 2 cpu= 1
|
||||
pool[04] ref= 1 nice= 0 idle/workers= 4/ 4 cpu= 2
|
||||
pool[05] ref= 1 nice=-20 idle/workers= 2/ 2 cpu= 2
|
||||
pool[06] ref= 1 nice= 0 idle/workers= 3/ 3 cpu= 3
|
||||
pool[07] ref= 1 nice=-20 idle/workers= 2/ 2 cpu= 3
|
||||
pool[08] ref=42 nice= 0 idle/workers= 6/ 6 cpus=0000000f
|
||||
pool[09] ref=28 nice= 0 idle/workers= 3/ 3 cpus=00000003
|
||||
pool[10] ref=28 nice= 0 idle/workers= 17/ 17 cpus=0000000c
|
||||
pool[11] ref= 1 nice=-20 idle/workers= 1/ 1 cpus=0000000f
|
||||
pool[12] ref= 2 nice=-20 idle/workers= 1/ 1 cpus=00000003
|
||||
pool[13] ref= 2 nice=-20 idle/workers= 1/ 1 cpus=0000000c
|
||||
|
||||
Workqueue CPU -> pool
|
||||
=====================
|
||||
[ workqueue \ CPU 0 1 2 3 dfl]
|
||||
events percpu 0 2 4 6
|
||||
events_highpri percpu 1 3 5 7
|
||||
events_long percpu 0 2 4 6
|
||||
events_unbound unbound 9 9 10 10 8
|
||||
events_freezable percpu 0 2 4 6
|
||||
events_power_efficient percpu 0 2 4 6
|
||||
events_freezable_power_ percpu 0 2 4 6
|
||||
rcu_gp percpu 0 2 4 6
|
||||
rcu_par_gp percpu 0 2 4 6
|
||||
slub_flushwq percpu 0 2 4 6
|
||||
netns ordered 8 8 8 8 8
|
||||
...
|
||||
|
||||
参见命令的帮助消息以获取更多信息。
|
||||
|
||||
|
||||
监视
|
||||
====
|
||||
|
||||
使用 tools/workqueue/wq_monitor.py 来监视工作队列的运行： ::
|
||||
|
||||
$ tools/workqueue/wq_monitor.py events
|
||||
total infl CPUtime CPUhog CMW/RPR mayday rescued
|
||||
events 18545 0 6.1 0 5 - -
|
||||
events_highpri 8 0 0.0 0 0 - -
|
||||
events_long 3 0 0.0 0 0 - -
|
||||
events_unbound 38306 0 0.1 - 7 - -
|
||||
events_freezable 0 0 0.0 0 0 - -
|
||||
events_power_efficient 29598 0 0.2 0 0 - -
|
||||
events_freezable_power_ 10 0 0.0 0 0 - -
|
||||
sock_diag_events 0 0 0.0 0 0 - -
|
||||
|
||||
total infl CPUtime CPUhog CMW/RPR mayday rescued
|
||||
events 18548 0 6.1 0 5 - -
|
||||
events_highpri 8 0 0.0 0 0 - -
|
||||
events_long 3 0 0.0 0 0 - -
|
||||
events_unbound 38322 0 0.1 - 7 - -
|
||||
events_freezable 0 0 0.0 0 0 - -
|
||||
events_power_efficient 29603 0 0.2 0 0 - -
|
||||
events_freezable_power_ 10 0 0.0 0 0 - -
|
||||
sock_diag_events 0 0 0.0 0 0 - -
|
||||
|
||||
...
|
||||
|
||||
参见命令的帮助消息以获取更多信息。
|
||||
|
||||
|
||||
调试
|
||||
====
|
||||
|
||||
|
|
@ -330,7 +675,6 @@ And with cmwq with ``@max_active`` >= 3, ::
|
|||
|
||||
工作队列保证，如果在工作项排队后满足以下条件，则工作项不能重入：
|
||||
|
||||
|
||||
1. 工作函数没有被改变。
|
||||
2. 没有人将该工作项排到另一个工作队列中。
|
||||
3. 该工作项尚未被重新启动。
|
||||
|
|
|
|||
103
MAINTAINERS
103
MAINTAINERS
|
|
@ -553,7 +553,7 @@ F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
|
|||
F: drivers/input/misc/adxl34x.c
|
||||
|
||||
ADXL355 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
|
||||
M: Puranjay Mohan <puranjay12@gmail.com>
|
||||
M: Puranjay Mohan <puranjay@kernel.org>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
|
||||
|
|
@ -2191,7 +2191,6 @@ N: mxs
|
|||
|
||||
ARM/FREESCALE LAYERSCAPE ARM ARCHITECTURE
|
||||
M: Shawn Guo <shawnguo@kernel.org>
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
||||
|
|
@ -2708,7 +2707,7 @@ F: sound/soc/rockchip/
|
|||
N: rockchip
|
||||
|
||||
ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
R: Alim Akhtar <alim.akhtar@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
|
|
@ -3573,6 +3572,7 @@ S: Supported
|
|||
C: irc://irc.oftc.net/bcache
|
||||
T: git https://evilpiepirate.org/git/bcachefs.git
|
||||
F: fs/bcachefs/
|
||||
F: Documentation/filesystems/bcachefs/
|
||||
|
||||
BDISP ST MEDIA DRIVER
|
||||
M: Fabien Dessenne <fabien.dessenne@foss.st.com>
|
||||
|
|
@ -3714,7 +3714,7 @@ F: drivers/iio/imu/bmi323/
|
|||
|
||||
BPF JIT for ARM
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
M: Puranjay Mohan <puranjay12@gmail.com>
|
||||
M: Puranjay Mohan <puranjay@kernel.org>
|
||||
L: bpf@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/net/
|
||||
|
|
@ -3764,6 +3764,8 @@ X: arch/riscv/net/bpf_jit_comp64.c
|
|||
|
||||
BPF JIT for RISC-V (64-bit)
|
||||
M: Björn Töpel <bjorn@kernel.org>
|
||||
R: Pu Lehui <pulehui@huawei.com>
|
||||
R: Puranjay Mohan <puranjay@kernel.org>
|
||||
L: bpf@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/riscv/net/
|
||||
|
|
@ -4191,7 +4193,6 @@ S: Supported
|
|||
F: drivers/scsi/bnx2i/
|
||||
|
||||
BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER
|
||||
M: Ariel Elior <aelior@marvell.com>
|
||||
M: Sudarsana Kalluru <skalluru@marvell.com>
|
||||
M: Manish Chopra <manishc@marvell.com>
|
||||
L: netdev@vger.kernel.org
|
||||
|
|
@ -4869,7 +4870,6 @@ F: drivers/power/supply/cw2015_battery.c
|
|||
CEPH COMMON CODE (LIBCEPH)
|
||||
M: Ilya Dryomov <idryomov@gmail.com>
|
||||
M: Xiubo Li <xiubli@redhat.com>
|
||||
R: Jeff Layton <jlayton@kernel.org>
|
||||
L: ceph-devel@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://ceph.com/
|
||||
|
|
@ -4881,7 +4881,6 @@ F: net/ceph/
|
|||
CEPH DISTRIBUTED FILE SYSTEM CLIENT (CEPH)
|
||||
M: Xiubo Li <xiubli@redhat.com>
|
||||
M: Ilya Dryomov <idryomov@gmail.com>
|
||||
R: Jeff Layton <jlayton@kernel.org>
|
||||
L: ceph-devel@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://ceph.com/
|
||||
|
|
@ -5557,7 +5556,7 @@ F: drivers/cpuidle/cpuidle-big_little.c
|
|||
CPUIDLE DRIVER - ARM EXYNOS
|
||||
M: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
M: Kukjin Kim <kgene@kernel.org>
|
||||
R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
R: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -7831,9 +7830,8 @@ W: http://aeschi.ch.eu.org/efs/
|
|||
F: fs/efs/
|
||||
|
||||
EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER
|
||||
M: Douglas Miller <dougmill@linux.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/ethernet/ibm/ehea/
|
||||
|
||||
ELM327 CAN NETWORK DRIVER
|
||||
|
|
@ -8523,7 +8521,6 @@ S: Maintained
|
|||
F: drivers/video/fbdev/fsl-diu-fb.*
|
||||
|
||||
FREESCALE DMA DRIVER
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
M: Zhang Wei <zw@zh-kernel.org>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
|
|
@ -8688,10 +8685,9 @@ F: drivers/soc/fsl/qe/tsa.h
|
|||
F: include/dt-bindings/soc/cpm1-fsl,tsa.h
|
||||
|
||||
FREESCALE QUICC ENGINE UCC ETHERNET DRIVER
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/ethernet/freescale/ucc_geth*
|
||||
|
||||
FREESCALE QUICC ENGINE UCC HDLC DRIVER
|
||||
|
|
@ -8708,10 +8704,9 @@ S: Maintained
|
|||
F: drivers/tty/serial/ucc_uart.c
|
||||
|
||||
FREESCALE SOC DRIVERS
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml
|
||||
F: Documentation/devicetree/bindings/soc/fsl/
|
||||
F: drivers/soc/fsl/
|
||||
|
|
@ -8745,17 +8740,15 @@ F: Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml
|
|||
F: sound/soc/fsl/fsl_qmc_audio.c
|
||||
|
||||
FREESCALE USB PERIPHERAL DRIVERS
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/gadget/udc/fsl*
|
||||
|
||||
FREESCALE USB PHY DRIVER
|
||||
M: Ran Wang <ran.wang_1@nxp.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/phy/phy-fsl-usb*
|
||||
|
||||
FREEVXFS FILESYSTEM
|
||||
|
|
@ -9000,7 +8993,7 @@ F: drivers/i2c/muxes/i2c-mux-gpio.c
|
|||
F: include/linux/platform_data/i2c-mux-gpio.h
|
||||
|
||||
GENERIC GPIO RESET DRIVER
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
S: Maintained
|
||||
F: drivers/reset/reset-gpio.c
|
||||
|
||||
|
|
@ -9583,7 +9576,7 @@ F: kernel/power/
|
|||
|
||||
HID CORE LAYER
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <bentiss@kernel.org>
|
||||
L: linux-input@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
|
|
@ -10030,7 +10023,7 @@ F: drivers/media/platform/st/sti/hva
|
|||
|
||||
HWPOISON MEMORY FAILURE HANDLING
|
||||
M: Miaohe Lin <linmiaohe@huawei.com>
|
||||
R: Naoya Horiguchi <naoya.horiguchi@nec.com>
|
||||
R: Naoya Horiguchi <nao.horiguchi@gmail.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/hwpoison-inject.c
|
||||
|
|
@ -12001,7 +11994,7 @@ F: include/keys/encrypted-type.h
|
|||
F: security/keys/encrypted-keys/
|
||||
|
||||
KEYS-TRUSTED
|
||||
M: James Bottomley <jejb@linux.ibm.com>
|
||||
M: James Bottomley <James.Bottomley@HansenPartnership.com>
|
||||
M: Jarkko Sakkinen <jarkko@kernel.org>
|
||||
M: Mimi Zohar <zohar@linux.ibm.com>
|
||||
L: linux-integrity@vger.kernel.org
|
||||
|
|
@ -13295,7 +13288,7 @@ F: drivers/iio/adc/max11205.c
|
|||
|
||||
MAXIM MAX17040 FAMILY FUEL GAUGE DRIVERS
|
||||
R: Iskren Chernev <iskren.chernev@gmail.com>
|
||||
R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
R: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
R: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
R: Matheus Castello <matheus@castello.eng.br>
|
||||
L: linux-pm@vger.kernel.org
|
||||
|
|
@ -13305,7 +13298,7 @@ F: drivers/power/supply/max17040_battery.c
|
|||
|
||||
MAXIM MAX17042 FAMILY FUEL GAUGE DRIVERS
|
||||
R: Hans de Goede <hdegoede@redhat.com>
|
||||
R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
R: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
R: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
R: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
|
||||
R: Purism Kernel Team <kernel@puri.sm>
|
||||
|
|
@ -13363,7 +13356,7 @@ F: Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml
|
|||
F: drivers/power/supply/max77976_charger.c
|
||||
|
||||
MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
B: mailto:linux-samsung-soc@vger.kernel.org
|
||||
|
|
@ -13374,7 +13367,7 @@ F: drivers/power/supply/max77693_charger.c
|
|||
|
||||
MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BOARDS
|
||||
M: Chanwoo Choi <cw00.choi@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
B: mailto:linux-samsung-soc@vger.kernel.org
|
||||
|
|
@ -14158,7 +14151,7 @@ F: mm/mm_init.c
|
|||
F: tools/testing/memblock/
|
||||
|
||||
MEMORY CONTROLLER DRIVERS
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
B: mailto:krzysztof.kozlowski@linaro.org
|
||||
|
|
@ -14363,7 +14356,7 @@ F: drivers/dma/at_xdmac.c
|
|||
F: include/dt-bindings/dma/at91.h
|
||||
|
||||
MICROCHIP AT91 SERIAL DRIVER
|
||||
M: Richard Genoud <richard.genoud@gmail.com>
|
||||
M: Richard Genoud <richard.genoud@bootlin.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
|
||||
F: drivers/tty/serial/atmel_serial.c
|
||||
|
|
@ -15168,9 +15161,8 @@ F: drivers/scsi/myrb.*
|
|||
F: drivers/scsi/myrs.*
|
||||
|
||||
MYRICOM MYRI-10G 10GbE DRIVER (MYRI10GE)
|
||||
M: Chris Lee <christopher.lee@cspi.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
S: Orphan
|
||||
W: https://www.cspi.com/ethernet-products/support/downloads/
|
||||
F: drivers/net/ethernet/myricom/myri10ge/
|
||||
|
||||
|
|
@ -15539,7 +15531,7 @@ F: include/uapi/linux/nexthop.h
|
|||
F: net/ipv4/nexthop.c
|
||||
|
||||
NFC SUBSYSTEM
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/nfc/
|
||||
|
|
@ -15916,7 +15908,7 @@ F: Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
|
|||
F: drivers/regulator/pf8x00-regulator.c
|
||||
|
||||
NXP PTN5150A CC LOGIC AND EXTCON DRIVER
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml
|
||||
|
|
@ -16527,7 +16519,7 @@ K: of_overlay_remove
|
|||
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
|
||||
M: Rob Herring <robh@kernel.org>
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk+dt@kernel.org>
|
||||
M: Conor Dooley <conor+dt@kernel.org>
|
||||
L: devicetree@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -16806,12 +16798,6 @@ S: Maintained
|
|||
F: drivers/leds/leds-pca9532.c
|
||||
F: include/linux/leds-pca9532.h
|
||||
|
||||
PCA9541 I2C BUS MASTER SELECTOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/muxes/i2c-mux-pca9541.c
|
||||
|
||||
PCI DRIVER FOR AARDVARK (Marvell Armada 3700)
|
||||
M: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
|
||||
M: Pali Rohár <pali@kernel.org>
|
||||
|
|
@ -16974,7 +16960,6 @@ F: drivers/pci/controller/dwc/pci-exynos.c
|
|||
|
||||
PCI DRIVER FOR SYNOPSYS DESIGNWARE
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
M: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -17485,7 +17470,7 @@ F: Documentation/devicetree/bindings/pinctrl/renesas,*
|
|||
F: drivers/pinctrl/renesas/
|
||||
|
||||
PIN CONTROLLER - SAMSUNG
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
R: Alim Akhtar <alim.akhtar@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
|
@ -17881,7 +17866,7 @@ F: Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml
|
|||
F: drivers/media/rc/pwm-ir-tx.c
|
||||
|
||||
PWM SUBSYSTEM
|
||||
M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|
||||
M: Uwe Kleine-König <ukleinek@kernel.org>
|
||||
L: linux-pwm@vger.kernel.org
|
||||
S: Maintained
|
||||
Q: https://patchwork.ozlabs.org/project/linux-pwm/list/
|
||||
|
|
@ -18005,7 +17990,6 @@ S: Supported
|
|||
F: drivers/scsi/qedi/
|
||||
|
||||
QLOGIC QL4xxx ETHERNET DRIVER
|
||||
M: Ariel Elior <aelior@marvell.com>
|
||||
M: Manish Chopra <manishc@marvell.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -18015,7 +17999,6 @@ F: include/linux/qed/
|
|||
|
||||
QLOGIC QL4xxx RDMA DRIVER
|
||||
M: Michal Kalderon <mkalderon@marvell.com>
|
||||
M: Ariel Elior <aelior@marvell.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/infiniband/hw/qedr/
|
||||
|
|
@ -19453,7 +19436,7 @@ F: Documentation/devicetree/bindings/sound/samsung*
|
|||
F: sound/soc/samsung/
|
||||
|
||||
SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-crypto@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -19488,7 +19471,7 @@ S: Maintained
|
|||
F: drivers/platform/x86/samsung-laptop.c
|
||||
|
||||
SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -19514,7 +19497,7 @@ F: drivers/media/platform/samsung/s3c-camif/
|
|||
F: include/media/drv-intf/s3c_camif.h
|
||||
|
||||
SAMSUNG S3FWRN5 NFC DRIVER
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml
|
||||
F: drivers/nfc/s3fwrn5
|
||||
|
|
@ -19535,7 +19518,7 @@ S: Supported
|
|||
F: drivers/media/i2c/s5k5baf.c
|
||||
|
||||
SAMSUNG S5P Security SubSystem (SSS) DRIVER
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Vladimir Zapolskiy <vz@mleia.com>
|
||||
L: linux-crypto@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
|
|
@ -19557,7 +19540,7 @@ F: Documentation/devicetree/bindings/media/samsung,fimc.yaml
|
|||
F: drivers/media/platform/samsung/exynos4-is/
|
||||
|
||||
SAMSUNG SOC CLOCK DRIVERS
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
M: Chanwoo Choi <cw00.choi@samsung.com>
|
||||
R: Alim Akhtar <alim.akhtar@samsung.com>
|
||||
|
|
@ -19589,7 +19572,7 @@ F: drivers/net/ethernet/samsung/sxgbe/
|
|||
|
||||
SAMSUNG THERMAL DRIVER
|
||||
M: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -19676,7 +19659,7 @@ F: drivers/scsi/sg.c
|
|||
F: include/scsi/sg.h
|
||||
|
||||
SCSI SUBSYSTEM
|
||||
M: "James E.J. Bottomley" <jejb@linux.ibm.com>
|
||||
M: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
|
||||
M: "Martin K. Petersen" <martin.petersen@oracle.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -20185,7 +20168,6 @@ F: include/linux/platform_data/simplefb.h
|
|||
|
||||
SIOX
|
||||
M: Thorsten Scherer <t.scherer@eckelmann.de>
|
||||
M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|
||||
R: Pengutronix Kernel Team <kernel@pengutronix.de>
|
||||
S: Supported
|
||||
F: drivers/gpio/gpio-siox.c
|
||||
|
|
@ -21934,7 +21916,7 @@ F: include/linux/soc/ti/ti_sci_inta_msi.h
|
|||
F: include/linux/soc/ti/ti_sci_protocol.h
|
||||
|
||||
TEXAS INSTRUMENTS' TMP117 TEMPERATURE SENSOR DRIVER
|
||||
M: Puranjay Mohan <puranjay12@gmail.com>
|
||||
M: Puranjay Mohan <puranjay@kernel.org>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml
|
||||
|
|
@ -22577,6 +22559,7 @@ Q: https://patchwork.kernel.org/project/linux-pm/list/
|
|||
B: https://bugzilla.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git turbostat
|
||||
F: tools/power/x86/turbostat/
|
||||
F: tools/testing/selftests/turbostat/
|
||||
|
||||
TW5864 VIDEO4LINUX DRIVER
|
||||
M: Bluecherry Maintainers <maintainers@bluecherrydvr.com>
|
||||
|
|
@ -22846,7 +22829,7 @@ F: drivers/usb/host/ehci*
|
|||
|
||||
USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <bentiss@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
|
|
@ -23785,7 +23768,7 @@ S: Orphan
|
|||
F: drivers/mmc/host/vub300.c
|
||||
|
||||
W1 DALLAS'S 1-WIRE BUS
|
||||
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/w1/
|
||||
F: Documentation/w1/
|
||||
|
|
@ -24474,6 +24457,14 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/har
|
|||
F: Documentation/admin-guide/LSM/Yama.rst
|
||||
F: security/yama/
|
||||
|
||||
YAML NETLINK (YNL)
|
||||
M: Donald Hunter <donald.hunter@gmail.com>
|
||||
M: Jakub Kicinski <kuba@kernel.org>
|
||||
F: Documentation/netlink/
|
||||
F: Documentation/userspace-api/netlink/intro-specs.rst
|
||||
F: Documentation/userspace-api/netlink/specs.rst
|
||||
F: tools/net/ynl/
|
||||
|
||||
YEALINK PHONE DRIVER
|
||||
M: Henk Vergonet <Henk.Vergonet@gmail.com>
|
||||
L: usbb2k-api-dev@nongnu.org
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 6
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
20
arch/Kconfig
20
arch/Kconfig
|
|
@ -9,6 +9,14 @@
|
|||
#
|
||||
source "arch/$(SRCARCH)/Kconfig"
|
||||
|
||||
config ARCH_CONFIGURES_CPU_MITIGATIONS
|
||||
bool
|
||||
|
||||
if !ARCH_CONFIGURES_CPU_MITIGATIONS
|
||||
config CPU_MITIGATIONS
|
||||
def_bool y
|
||||
endif
|
||||
|
||||
menu "General architecture-dependent options"
|
||||
|
||||
config ARCH_HAS_SUBPAGE_FAULTS
|
||||
|
|
@ -1172,12 +1180,12 @@ config PAGE_SIZE_LESS_THAN_256KB
|
|||
|
||||
config PAGE_SHIFT
|
||||
int
|
||||
default 12 if PAGE_SIZE_4KB
|
||||
default 13 if PAGE_SIZE_8KB
|
||||
default 14 if PAGE_SIZE_16KB
|
||||
default 15 if PAGE_SIZE_32KB
|
||||
default 16 if PAGE_SIZE_64KB
|
||||
default 18 if PAGE_SIZE_256KB
|
||||
default 12 if PAGE_SIZE_4KB
|
||||
default 13 if PAGE_SIZE_8KB
|
||||
default 14 if PAGE_SIZE_16KB
|
||||
default 15 if PAGE_SIZE_32KB
|
||||
default 16 if PAGE_SIZE_64KB
|
||||
default 18 if PAGE_SIZE_256KB
|
||||
|
||||
# This allows to use a set of generic functions to determine mmap base
|
||||
# address by giving priority to top-down scheme only if the process
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
config ARC
|
||||
def_bool y
|
||||
select ARC_TIMERS
|
||||
select ARCH_HAS_CPU_CACHE_ALIASING
|
||||
select ARCH_HAS_CACHE_LINE_SIZE
|
||||
select ARCH_HAS_DEBUG_VM_PGTABLE
|
||||
select ARCH_HAS_DMA_PREP_COHERENT
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
# uImage build relies on mkimage being availble on your host for ARC target
|
||||
# uImage build relies on mkimage being available on your host for ARC target
|
||||
# You will need to build u-boot for ARC, rename mkimage to arc-elf32-mkimage
|
||||
# and make sure it's reacable from your PATH
|
||||
# and make sure it's reachable from your PATH
|
||||
|
||||
OBJCOPYFLAGS= -O binary -R .note -R .note.gnu.build-id -R .comment -S
|
||||
|
||||
|
|
|
|||
|
|
@ -119,9 +119,9 @@
|
|||
/*
|
||||
* The DW APB ICTL intc on MB is connected to CPU intc via a
|
||||
* DT "invisible" DW APB GPIO block, configured to simply pass thru
|
||||
* interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
|
||||
* interrupts - setup accordingly in platform init (plat-axs10x/ax10x.c)
|
||||
*
|
||||
* So here we mimic a direct connection betwen them, ignoring the
|
||||
* So here we mimic a direct connection between them, ignoring the
|
||||
* ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
|
||||
* instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
|
||||
*
|
||||
|
|
|
|||
|
|
@ -205,7 +205,6 @@
|
|||
};
|
||||
|
||||
gmac: ethernet@8000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = <0x8000 0x2000>;
|
||||
interrupts = <10>;
|
||||
|
|
|
|||
|
|
@ -113,7 +113,7 @@
|
|||
/*
|
||||
* Embedded Vision subsystem UIO mappings; only relevant for EV VDK
|
||||
*
|
||||
* This node is intentionally put outside of MB above becase
|
||||
* This node is intentionally put outside of MB above because
|
||||
* it maps areas outside of MB's 0xez-0xfz.
|
||||
*/
|
||||
uio_ev: uio@d0000000 {
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef __ASM_ARC_CACHETYPE_H
|
||||
#define __ASM_ARC_CACHETYPE_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define cpu_dcache_is_aliasing() true
|
||||
|
||||
#endif
|
||||
|
|
@ -12,7 +12,7 @@
|
|||
/*
|
||||
* DSP-related saved registers - need to be saved only when you are
|
||||
* scheduled out.
|
||||
* structure fields name must correspond to aux register defenitions for
|
||||
* structure fields name must correspond to aux register definitions for
|
||||
* automatic offset calculation in DSP_AUX_SAVE_RESTORE macros
|
||||
*/
|
||||
struct dsp_callee_regs {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
* Stack switching code can no longer reliably rely on the fact that
|
||||
* if we are NOT in user mode, stack is switched to kernel mode.
|
||||
* e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
|
||||
* it's prologue including stack switching from user mode
|
||||
* its prologue including stack switching from user mode
|
||||
*
|
||||
* Vineetg: Aug 28th 2008: Bug #94984
|
||||
* -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
|
||||
|
|
@ -143,7 +143,7 @@
|
|||
* 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
|
||||
* 3. But before it could switch SP from USER to KERNEL stack
|
||||
* a L2 IRQ "Interrupts" L1
|
||||
* Thay way although L2 IRQ happened in Kernel mode, stack is still
|
||||
* That way although L2 IRQ happened in Kernel mode, stack is still
|
||||
* not switched.
|
||||
* To handle this, we may need to switch stack even if in kernel mode
|
||||
* provided SP has values in range of USER mode stack ( < 0x7000_0000 )
|
||||
|
|
@ -173,7 +173,7 @@
|
|||
|
||||
GET_CURR_TASK_ON_CPU r9
|
||||
|
||||
/* With current tsk in r9, get it's kernel mode stack base */
|
||||
/* With current tsk in r9, get its kernel mode stack base */
|
||||
GET_TSK_STACK_BASE r9, r9
|
||||
|
||||
/* save U mode SP @ pt_regs->sp */
|
||||
|
|
@ -282,7 +282,7 @@
|
|||
* NOTE:
|
||||
*
|
||||
* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
|
||||
* for memory load operations. If used in that way interrupts are deffered
|
||||
* for memory load operations. If used in that way interrupts are deferred
|
||||
* by hardware and that is not good.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro EXCEPTION_EPILOGUE
|
||||
|
|
@ -350,7 +350,7 @@
|
|||
* NOTE:
|
||||
*
|
||||
* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
|
||||
* for memory load operations. If used in that way interrupts are deffered
|
||||
* for memory load operations. If used in that way interrupts are deferred
|
||||
* by hardware and that is not good.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro INTERRUPT_EPILOGUE LVL
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#ifndef __ASM_ARC_ENTRY_H
|
||||
#define __ASM_ARC_ENTRY_H
|
||||
|
||||
#include <asm/unistd.h> /* For NR_syscalls defination */
|
||||
#include <asm/unistd.h> /* For NR_syscalls definition */
|
||||
#include <asm/arcregs.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/processor.h> /* For VMALLOC_START */
|
||||
|
|
@ -56,7 +56,7 @@
|
|||
.endm
|
||||
|
||||
/*-------------------------------------------------------------
|
||||
* given a tsk struct, get to the base of it's kernel mode stack
|
||||
* given a tsk struct, get to the base of its kernel mode stack
|
||||
* tsk->thread_info is really a PAGE, whose bottom hoists stack
|
||||
* which grows upwards towards thread_info
|
||||
*------------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
* ARCv2 can support 240 interrupts in the core interrupts controllers and
|
||||
* 128 interrupts in IDU. Thus 512 virtual IRQs must be enough for most
|
||||
* configurations of boards.
|
||||
* This doesnt affect ARCompact, but we change it to same value
|
||||
* This doesn't affect ARCompact, but we change it to same value
|
||||
*/
|
||||
#define NR_IRQS 512
|
||||
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
* IRQ Control Macros
|
||||
*
|
||||
* All of them have "memory" clobber (compiler barrier) which is needed to
|
||||
* ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
|
||||
* ensure that LD/ST requiring irq safety (R-M-W when LLSC is not available)
|
||||
* are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
|
||||
*
|
||||
* Noted at the time of Abilis Timer List corruption
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
|
|||
* for retiring-mm. However destroy_context( ) still needs to do that because
|
||||
* between mm_release( ) = >deactive_mm( ) and
|
||||
* mmput => .. => __mmdrop( ) => destroy_context( )
|
||||
* there is a good chance that task gets sched-out/in, making it's ASID valid
|
||||
* there is a good chance that task gets sched-out/in, making its ASID valid
|
||||
* again (this teased me for a whole day).
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@
|
|||
* Other rules which cause the divergence from 1:1 mapping
|
||||
*
|
||||
* 1. Although ARC700 can do exclusive execute/write protection (meaning R
|
||||
* can be tracked independet of X/W unlike some other CPUs), still to
|
||||
* can be tracked independently of X/W unlike some other CPUs), still to
|
||||
* keep things consistent with other archs:
|
||||
* -Write implies Read: W => R
|
||||
* -Execute implies Read: X => R
|
||||
|
|
|
|||
|
|
@ -169,7 +169,7 @@ static inline unsigned long regs_get_register(struct pt_regs *regs,
|
|||
return *(unsigned long *)((unsigned long)regs + offset);
|
||||
}
|
||||
|
||||
extern int syscall_trace_entry(struct pt_regs *);
|
||||
extern int syscall_trace_enter(struct pt_regs *);
|
||||
extern void syscall_trace_exit(struct pt_regs *);
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#ifndef __ARC_ASM_SHMPARAM_H
|
||||
#define __ARC_ASM_SHMPARAM_H
|
||||
|
||||
/* Handle upto 2 cache bins */
|
||||
/* Handle up to 2 cache bins */
|
||||
#define SHMLBA (2 * PAGE_SIZE)
|
||||
|
||||
/* Enforce SHMLBA in shmat */
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)
|
|||
|
||||
/*
|
||||
* ARC700 doesn't support atomic Read-Modify-Write ops.
|
||||
* Originally Interrupts had to be disabled around code to gaurantee atomicity.
|
||||
* Originally Interrupts had to be disabled around code to guarantee atomicity.
|
||||
* The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
|
||||
* based on retry-if-irq-in-atomic (with hardware assist).
|
||||
* However despite these, we provide the IRQ disabling variant
|
||||
|
|
@ -86,7 +86,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)
|
|||
* support needed.
|
||||
*
|
||||
* (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be
|
||||
* gaurantted by the platform (not something which core handles).
|
||||
* guaranteed by the platform (not something which core handles).
|
||||
* Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
|
||||
* disabling for atomicity.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
struct thread_info {
|
||||
unsigned long flags; /* low level flags */
|
||||
unsigned long ksp; /* kernel mode stack top in __switch_to */
|
||||
int preempt_count; /* 0 => preemptable, <0 => BUG */
|
||||
int preempt_count; /* 0 => preemptible, <0 => BUG */
|
||||
int cpu; /* current CPU */
|
||||
unsigned long thr_ptr; /* TLS ptr */
|
||||
struct task_struct *task; /* main task structure */
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@
|
|||
* 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem
|
||||
*
|
||||
* Joern suggested a better "C" algorithm which is great since
|
||||
* (1) It is portable to any architecure
|
||||
* (1) It is portable to any architecture
|
||||
* (2) At the same time it takes advantage of ARC ISA (rotate intrns)
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h> /* ARC_{EXTRY,EXIT} */
|
||||
#include <linux/linkage.h> /* ARC_{ENTRY,EXIT} */
|
||||
#include <asm/entry.h> /* SAVE_ALL_{INT1,INT2,TRAP...} */
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arcregs.h>
|
||||
|
|
@ -31,7 +31,7 @@ VECTOR res_service ; Reset Vector
|
|||
VECTOR mem_service ; Mem exception
|
||||
VECTOR instr_service ; Instrn Error
|
||||
VECTOR EV_MachineCheck ; Fatal Machine check
|
||||
VECTOR EV_TLBMissI ; Intruction TLB miss
|
||||
VECTOR EV_TLBMissI ; Instruction TLB miss
|
||||
VECTOR EV_TLBMissD ; Data TLB miss
|
||||
VECTOR EV_TLBProtV ; Protection Violation
|
||||
VECTOR EV_PrivilegeV ; Privilege Violation
|
||||
|
|
@ -76,11 +76,11 @@ ENTRY(handle_interrupt)
|
|||
# query in hard ISR path would return false (since .IE is set) which would
|
||||
# trips genirq interrupt handling asserts.
|
||||
#
|
||||
# So do a "soft" disable of interrutps here.
|
||||
# So do a "soft" disable of interrupts here.
|
||||
#
|
||||
# Note this disable is only for consistent book-keeping as further interrupts
|
||||
# will be disabled anyways even w/o this. Hardware tracks active interrupts
|
||||
# seperately in AUX_IRQ_ACT.active and will not take new interrupts
|
||||
# separately in AUX_IRQ_ACT.active and will not take new interrupts
|
||||
# unless this one returns (or higher prio becomes pending in 2-prio scheme)
|
||||
|
||||
IRQ_DISABLE
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ ENTRY(EV_MachineCheck)
|
|||
lr r0, [efa]
|
||||
mov r1, sp
|
||||
|
||||
; MC excpetions disable MMU
|
||||
; MC exceptions disable MMU
|
||||
ARC_MMU_REENABLE r3
|
||||
|
||||
lsr r3, r10, 8
|
||||
|
|
@ -209,7 +209,7 @@ trap_with_param:
|
|||
|
||||
; ---------------------------------------------
|
||||
; syscall TRAP
|
||||
; ABI: (r0-r7) upto 8 args, (r8) syscall number
|
||||
; ABI: (r0-r7) up to 8 args, (r8) syscall number
|
||||
; ---------------------------------------------
|
||||
|
||||
ENTRY(EV_Trap)
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ ENTRY(first_lines_of_secondary)
|
|||
; setup stack (fp, sp)
|
||||
mov fp, 0
|
||||
|
||||
; set it's stack base to tsk->thread_info bottom
|
||||
; set its stack base to tsk->thread_info bottom
|
||||
GET_TSK_STACK_BASE r0, sp
|
||||
|
||||
j start_kernel_secondary
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@ void arc_init_IRQ(void)
|
|||
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
|
||||
|
||||
/*
|
||||
* ARCv2 core intc provides multiple interrupt priorities (upto 16).
|
||||
* ARCv2 core intc provides multiple interrupt priorities (up to 16).
|
||||
* Typical builds though have only two levels (0-high, 1-low)
|
||||
* Linux by default uses lower prio 1 for most irqs, reserving 0 for
|
||||
* NMI style interrupts in future (say perf)
|
||||
|
|
|
|||
|
|
@ -190,7 +190,8 @@ static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs)
|
|||
}
|
||||
}
|
||||
|
||||
int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
static int
|
||||
__kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe *p;
|
||||
struct kprobe_ctlblk *kcb;
|
||||
|
|
@ -241,8 +242,8 @@ int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __kprobes arc_post_kprobe_handler(unsigned long addr,
|
||||
struct pt_regs *regs)
|
||||
static int
|
||||
__kprobes arc_post_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe *cur = kprobe_running();
|
||||
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
* (based on a specific RTL build)
|
||||
* Below is the static map between perf generic/arc specific event_id and
|
||||
* h/w condition names.
|
||||
* At the time of probe, we loop thru each index and find it's name to
|
||||
* At the time of probe, we loop thru each index and find its name to
|
||||
* complete the mapping of perf event_id to h/w index as latter is needed
|
||||
* to program the counter really
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -390,7 +390,7 @@ static void arc_chk_core_config(struct cpuinfo_arc *info)
|
|||
#ifdef CONFIG_ARC_HAS_DCCM
|
||||
/*
|
||||
* DCCM can be arbit placed in hardware.
|
||||
* Make sure it's placement/sz matches what Linux is built with
|
||||
* Make sure its placement/sz matches what Linux is built with
|
||||
*/
|
||||
if ((unsigned int)__arc_dccm_base != info->dccm.base)
|
||||
panic("Linux built with incorrect DCCM Base address\n");
|
||||
|
|
|
|||
|
|
@ -8,15 +8,16 @@
|
|||
*
|
||||
* vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)
|
||||
* -do_signal() supports TIF_RESTORE_SIGMASK
|
||||
* -do_signal() no loner needs oldset, required by OLD sys_sigsuspend
|
||||
* -sys_rt_sigsuspend() now comes from generic code, so discard arch implemen
|
||||
* -do_signal() no longer needs oldset, required by OLD sys_sigsuspend
|
||||
* -sys_rt_sigsuspend() now comes from generic code, so discard arch
|
||||
* implementation
|
||||
* -sys_sigsuspend() no longer needs to fudge ptregs, hence that arg removed
|
||||
* -sys_sigsuspend() no longer loops for do_signal(), sets TIF_xxx and leaves
|
||||
* the job to do_signal()
|
||||
*
|
||||
* vineetg: July 2009
|
||||
* -Modified Code to support the uClibc provided userland sigreturn stub
|
||||
* to avoid kernel synthesing it on user stack at runtime, costing TLB
|
||||
* to avoid kernel synthesizing it on user stack at runtime, costing TLB
|
||||
* probes and Cache line flushes.
|
||||
*
|
||||
* vineetg: July 2009
|
||||
|
|
|
|||
|
|
@ -89,7 +89,7 @@ int do_misaligned_access(unsigned long address, struct pt_regs *regs,
|
|||
|
||||
/*
|
||||
* Entry point for miscll errors such as Nested Exceptions
|
||||
* -Duplicate TLB entry is handled seperately though
|
||||
* -Duplicate TLB entry is handled separately though
|
||||
*/
|
||||
void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@ SECTIONS
|
|||
#endif
|
||||
|
||||
/*
|
||||
* The reason for having a seperate subsection .init.ramfs is to
|
||||
* prevent objump from including it in kernel dumps
|
||||
* The reason for having a separate subsection .init.ramfs is to
|
||||
* prevent objdump from including it in kernel dumps
|
||||
*
|
||||
* Reason for having .init.ramfs above .init is to make sure that the
|
||||
* binary blob is tucked away to one side, reducing the displacement
|
||||
|
|
|
|||
|
|
@ -212,7 +212,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
|
|||
unsigned long flags;
|
||||
|
||||
/* If range @start to @end is more than 32 TLB entries deep,
|
||||
* its better to move to a new ASID rather than searching for
|
||||
* it's better to move to a new ASID rather than searching for
|
||||
* individual entries and then shooting them down
|
||||
*
|
||||
* The calc above is rough, doesn't account for unaligned parts,
|
||||
|
|
@ -408,7 +408,7 @@ static void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *p
|
|||
* -More importantly it makes this handler inconsistent with fast-path
|
||||
* TLB Refill handler which always deals with "current"
|
||||
*
|
||||
* Lets see the use cases when current->mm != vma->mm and we land here
|
||||
* Let's see the use cases when current->mm != vma->mm and we land here
|
||||
* 1. execve->copy_strings()->__get_user_pages->handle_mm_fault
|
||||
* Here VM wants to pre-install a TLB entry for user stack while
|
||||
* current->mm still points to pre-execve mm (hence the condition).
|
||||
|
|
|
|||
|
|
@ -5,19 +5,19 @@
|
|||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* Vineetg: April 2011 :
|
||||
* -MMU v1: moved out legacy code into a seperate file
|
||||
* -MMU v1: moved out legacy code into a separate file
|
||||
* -MMU v3: PD{0,1} bits layout changed: They don't overlap anymore,
|
||||
* helps avoid a shift when preparing PD0 from PTE
|
||||
*
|
||||
* Vineetg: July 2009
|
||||
* -For MMU V2, we need not do heuristics at the time of commiting a D-TLB
|
||||
* entry, so that it doesn't knock out it's I-TLB entry
|
||||
* -For MMU V2, we need not do heuristics at the time of committing a D-TLB
|
||||
* entry, so that it doesn't knock out its I-TLB entry
|
||||
* -Some more fine tuning:
|
||||
* bmsk instead of add, asl.cc instead of branch, delay slot utilise etc
|
||||
*
|
||||
* Vineetg: July 2009
|
||||
* -Practically rewrote the I/D TLB Miss handlers
|
||||
* Now 40 and 135 instructions a peice as compared to 131 and 449 resp.
|
||||
* Now 40 and 135 instructions apiece as compared to 131 and 449 resp.
|
||||
* Hence Leaner by 1.5 K
|
||||
* Used Conditional arithmetic to replace excessive branching
|
||||
* Also used short instructions wherever possible
|
||||
|
|
|
|||
|
|
@ -242,7 +242,7 @@
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1150000>;
|
||||
regulator-suspend-microvolt = <1150000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -263,7 +263,7 @@
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1050000>;
|
||||
regulator-suspend-microvolt = <1050000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -280,7 +280,7 @@
|
|||
regulator-always-on;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <1800000>;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
@ -296,7 +296,7 @@
|
|||
regulator-always-on;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <3300000>;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -293,7 +293,7 @@
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1150000>;
|
||||
regulator-suspend-microvolt = <1150000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -314,7 +314,7 @@
|
|||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-voltage = <1050000>;
|
||||
regulator-suspend-microvolt = <1050000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
|
|
@ -331,7 +331,7 @@
|
|||
regulator-always-on;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <1800000>;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
@ -346,7 +346,7 @@
|
|||
regulator-max-microvolt = <3700000>;
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-suspend-voltage = <1800000>;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -805,6 +805,7 @@
|
|||
&pinctrl_usb_pwr>;
|
||||
dr_mode = "host";
|
||||
power-active-high;
|
||||
over-current-active-low;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -666,7 +666,7 @@
|
|||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
no-sdio;
|
||||
no-emmc;
|
||||
no-mmc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -210,6 +210,7 @@
|
|||
remote-endpoint = <&mipi_from_sensor>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1>;
|
||||
link-frequencies = /bits/ 64 <330000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -79,10 +79,8 @@ static struct musb_hdrc_platform_data tusb_data = {
|
|||
static struct gpiod_lookup_table tusb_gpio_table = {
|
||||
.dev_id = "musb-tusb",
|
||||
.table = {
|
||||
GPIO_LOOKUP("gpio-0-15", 0, "enable",
|
||||
GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-48-63", 10, "int",
|
||||
GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-0-31", 0, "enable", GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-32-63", 26, "int", GPIO_ACTIVE_HIGH),
|
||||
{ }
|
||||
},
|
||||
};
|
||||
|
|
@ -140,12 +138,11 @@ static int slot1_cover_open;
|
|||
static int slot2_cover_open;
|
||||
static struct device *mmc_device;
|
||||
|
||||
static struct gpiod_lookup_table nokia8xx_mmc_gpio_table = {
|
||||
static struct gpiod_lookup_table nokia800_mmc_gpio_table = {
|
||||
.dev_id = "mmci-omap.0",
|
||||
.table = {
|
||||
/* Slot switch, GPIO 96 */
|
||||
GPIO_LOOKUP("gpio-80-111", 16,
|
||||
"switch", GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH),
|
||||
{ }
|
||||
},
|
||||
};
|
||||
|
|
@ -153,12 +150,12 @@ static struct gpiod_lookup_table nokia8xx_mmc_gpio_table = {
|
|||
static struct gpiod_lookup_table nokia810_mmc_gpio_table = {
|
||||
.dev_id = "mmci-omap.0",
|
||||
.table = {
|
||||
/* Slot switch, GPIO 96 */
|
||||
GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH),
|
||||
/* Slot index 1, VSD power, GPIO 23 */
|
||||
GPIO_LOOKUP_IDX("gpio-16-31", 7,
|
||||
"vsd", 1, GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP_IDX("gpio-0-31", 23, "vsd", 1, GPIO_ACTIVE_HIGH),
|
||||
/* Slot index 1, VIO power, GPIO 9 */
|
||||
GPIO_LOOKUP_IDX("gpio-0-15", 9,
|
||||
"vio", 1, GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP_IDX("gpio-0-31", 9, "vio", 1, GPIO_ACTIVE_HIGH),
|
||||
{ }
|
||||
},
|
||||
};
|
||||
|
|
@ -415,8 +412,6 @@ static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
|
|||
|
||||
static void __init n8x0_mmc_init(void)
|
||||
{
|
||||
gpiod_add_lookup_table(&nokia8xx_mmc_gpio_table);
|
||||
|
||||
if (board_is_n810()) {
|
||||
mmc1_data.slots[0].name = "external";
|
||||
|
||||
|
|
@ -429,6 +424,8 @@ static void __init n8x0_mmc_init(void)
|
|||
mmc1_data.slots[1].name = "internal";
|
||||
mmc1_data.slots[1].ban_openended = 1;
|
||||
gpiod_add_lookup_table(&nokia810_mmc_gpio_table);
|
||||
} else {
|
||||
gpiod_add_lookup_table(&nokia800_mmc_gpio_table);
|
||||
}
|
||||
|
||||
mmc1_data.nr_slots = 2;
|
||||
|
|
|
|||
|
|
@ -871,16 +871,11 @@ static inline void emit_a32_alu_r64(const bool is64, const s8 dst[],
|
|||
}
|
||||
|
||||
/* dst = src (4 bytes)*/
|
||||
static inline void emit_a32_mov_r(const s8 dst, const s8 src, const u8 off,
|
||||
struct jit_ctx *ctx) {
|
||||
static inline void emit_a32_mov_r(const s8 dst, const s8 src, struct jit_ctx *ctx) {
|
||||
const s8 *tmp = bpf2a32[TMP_REG_1];
|
||||
s8 rt;
|
||||
|
||||
rt = arm_bpf_get_reg32(src, tmp[0], ctx);
|
||||
if (off && off != 32) {
|
||||
emit(ARM_LSL_I(rt, rt, 32 - off), ctx);
|
||||
emit(ARM_ASR_I(rt, rt, 32 - off), ctx);
|
||||
}
|
||||
arm_bpf_put_reg32(dst, rt, ctx);
|
||||
}
|
||||
|
||||
|
|
@ -889,15 +884,15 @@ static inline void emit_a32_mov_r64(const bool is64, const s8 dst[],
|
|||
const s8 src[],
|
||||
struct jit_ctx *ctx) {
|
||||
if (!is64) {
|
||||
emit_a32_mov_r(dst_lo, src_lo, 0, ctx);
|
||||
emit_a32_mov_r(dst_lo, src_lo, ctx);
|
||||
if (!ctx->prog->aux->verifier_zext)
|
||||
/* Zero out high 4 bytes */
|
||||
emit_a32_mov_i(dst_hi, 0, ctx);
|
||||
} else if (__LINUX_ARM_ARCH__ < 6 &&
|
||||
ctx->cpu_architecture < CPU_ARCH_ARMv5TE) {
|
||||
/* complete 8 byte move */
|
||||
emit_a32_mov_r(dst_lo, src_lo, 0, ctx);
|
||||
emit_a32_mov_r(dst_hi, src_hi, 0, ctx);
|
||||
emit_a32_mov_r(dst_lo, src_lo, ctx);
|
||||
emit_a32_mov_r(dst_hi, src_hi, ctx);
|
||||
} else if (is_stacked(src_lo) && is_stacked(dst_lo)) {
|
||||
const u8 *tmp = bpf2a32[TMP_REG_1];
|
||||
|
||||
|
|
@ -917,17 +912,52 @@ static inline void emit_a32_mov_r64(const bool is64, const s8 dst[],
|
|||
static inline void emit_a32_movsx_r64(const bool is64, const u8 off, const s8 dst[], const s8 src[],
|
||||
struct jit_ctx *ctx) {
|
||||
const s8 *tmp = bpf2a32[TMP_REG_1];
|
||||
const s8 *rt;
|
||||
s8 rs;
|
||||
s8 rd;
|
||||
|
||||
rt = arm_bpf_get_reg64(dst, tmp, ctx);
|
||||
if (is_stacked(dst_lo))
|
||||
rd = tmp[1];
|
||||
else
|
||||
rd = dst_lo;
|
||||
rs = arm_bpf_get_reg32(src_lo, rd, ctx);
|
||||
/* rs may be one of src[1], dst[1], or tmp[1] */
|
||||
|
||||
/* Sign extend rs if needed. If off == 32, lower 32-bits of src are moved to dst and sign
|
||||
* extension only happens in the upper 64 bits.
|
||||
*/
|
||||
if (off != 32) {
|
||||
/* Sign extend rs into rd */
|
||||
emit(ARM_LSL_I(rd, rs, 32 - off), ctx);
|
||||
emit(ARM_ASR_I(rd, rd, 32 - off), ctx);
|
||||
} else {
|
||||
rd = rs;
|
||||
}
|
||||
|
||||
/* Write rd to dst_lo
|
||||
*
|
||||
* Optimization:
|
||||
* Assume:
|
||||
* 1. dst == src and stacked.
|
||||
* 2. off == 32
|
||||
*
|
||||
* In this case src_lo was loaded into rd(tmp[1]) but rd was not sign extended as off==32.
|
||||
* So, we don't need to write rd back to dst_lo as they have the same value.
|
||||
* This saves us one str instruction.
|
||||
*/
|
||||
if (dst_lo != src_lo || off != 32)
|
||||
arm_bpf_put_reg32(dst_lo, rd, ctx);
|
||||
|
||||
emit_a32_mov_r(dst_lo, src_lo, off, ctx);
|
||||
if (!is64) {
|
||||
if (!ctx->prog->aux->verifier_zext)
|
||||
/* Zero out high 4 bytes */
|
||||
emit_a32_mov_i(dst_hi, 0, ctx);
|
||||
} else {
|
||||
emit(ARM_ASR_I(rt[0], rt[1], 31), ctx);
|
||||
if (is_stacked(dst_hi)) {
|
||||
emit(ARM_ASR_I(tmp[0], rd, 31), ctx);
|
||||
arm_bpf_put_reg32(dst_hi, tmp[0], ctx);
|
||||
} else {
|
||||
emit(ARM_ASR_I(dst_hi, rd, 31), ctx);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ conn_subsys: bus@5b000000 {
|
|||
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
|
||||
fsl,usbphy = <&usbphy1>;
|
||||
fsl,usbmisc = <&usbmisc1 0>;
|
||||
clocks = <&usb2_lpcg 0>;
|
||||
clocks = <&usb2_lpcg IMX_LPCG_CLK_6>;
|
||||
ahb-burst-config = <0x0>;
|
||||
tx-burst-size-dword = <0x10>;
|
||||
rx-burst-size-dword = <0x10>;
|
||||
|
|
@ -58,7 +58,7 @@ conn_subsys: bus@5b000000 {
|
|||
usbphy1: usbphy@5b100000 {
|
||||
compatible = "fsl,imx7ulp-usbphy";
|
||||
reg = <0x5b100000 0x1000>;
|
||||
clocks = <&usb2_lpcg 1>;
|
||||
clocks = <&usb2_lpcg IMX_LPCG_CLK_7>;
|
||||
power-domains = <&pd IMX_SC_R_USB_0_PHY>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -67,8 +67,8 @@ conn_subsys: bus@5b000000 {
|
|||
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x5b010000 0x10000>;
|
||||
clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
|
||||
<&sdhc0_lpcg IMX_LPCG_CLK_0>,
|
||||
<&sdhc0_lpcg IMX_LPCG_CLK_5>;
|
||||
<&sdhc0_lpcg IMX_LPCG_CLK_5>,
|
||||
<&sdhc0_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
power-domains = <&pd IMX_SC_R_SDHC_0>;
|
||||
status = "disabled";
|
||||
|
|
@ -78,8 +78,8 @@ conn_subsys: bus@5b000000 {
|
|||
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x5b020000 0x10000>;
|
||||
clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
|
||||
<&sdhc1_lpcg IMX_LPCG_CLK_0>,
|
||||
<&sdhc1_lpcg IMX_LPCG_CLK_5>;
|
||||
<&sdhc1_lpcg IMX_LPCG_CLK_5>,
|
||||
<&sdhc1_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
power-domains = <&pd IMX_SC_R_SDHC_1>;
|
||||
fsl,tuning-start-tap = <20>;
|
||||
|
|
@ -91,8 +91,8 @@ conn_subsys: bus@5b000000 {
|
|||
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x5b030000 0x10000>;
|
||||
clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
|
||||
<&sdhc2_lpcg IMX_LPCG_CLK_0>,
|
||||
<&sdhc2_lpcg IMX_LPCG_CLK_5>;
|
||||
<&sdhc2_lpcg IMX_LPCG_CLK_5>,
|
||||
<&sdhc2_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
power-domains = <&pd IMX_SC_R_SDHC_2>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -28,8 +28,8 @@ dma_subsys: bus@5a000000 {
|
|||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&spi0_lpcg 0>,
|
||||
<&spi0_lpcg 1>;
|
||||
clocks = <&spi0_lpcg IMX_LPCG_CLK_0>,
|
||||
<&spi0_lpcg IMX_LPCG_CLK_4>;
|
||||
clock-names = "per", "ipg";
|
||||
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <60000000>;
|
||||
|
|
@ -44,8 +44,8 @@ dma_subsys: bus@5a000000 {
|
|||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&spi1_lpcg 0>,
|
||||
<&spi1_lpcg 1>;
|
||||
clocks = <&spi1_lpcg IMX_LPCG_CLK_0>,
|
||||
<&spi1_lpcg IMX_LPCG_CLK_4>;
|
||||
clock-names = "per", "ipg";
|
||||
assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <60000000>;
|
||||
|
|
@ -60,8 +60,8 @@ dma_subsys: bus@5a000000 {
|
|||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&spi2_lpcg 0>,
|
||||
<&spi2_lpcg 1>;
|
||||
clocks = <&spi2_lpcg IMX_LPCG_CLK_0>,
|
||||
<&spi2_lpcg IMX_LPCG_CLK_4>;
|
||||
clock-names = "per", "ipg";
|
||||
assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <60000000>;
|
||||
|
|
@ -76,8 +76,8 @@ dma_subsys: bus@5a000000 {
|
|||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&spi3_lpcg 0>,
|
||||
<&spi3_lpcg 1>;
|
||||
clocks = <&spi3_lpcg IMX_LPCG_CLK_0>,
|
||||
<&spi3_lpcg IMX_LPCG_CLK_4>;
|
||||
clock-names = "per", "ipg";
|
||||
assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <60000000>;
|
||||
|
|
@ -145,8 +145,8 @@ dma_subsys: bus@5a000000 {
|
|||
compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
|
||||
reg = <0x5a190000 0x1000>;
|
||||
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&adma_pwm_lpcg 1>,
|
||||
<&adma_pwm_lpcg 0>;
|
||||
clocks = <&adma_pwm_lpcg IMX_LPCG_CLK_4>,
|
||||
<&adma_pwm_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "per";
|
||||
assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
|
|
@ -355,8 +355,8 @@ dma_subsys: bus@5a000000 {
|
|||
reg = <0x5a880000 0x10000>;
|
||||
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&adc0_lpcg 0>,
|
||||
<&adc0_lpcg 1>;
|
||||
clocks = <&adc0_lpcg IMX_LPCG_CLK_0>,
|
||||
<&adc0_lpcg IMX_LPCG_CLK_4>;
|
||||
clock-names = "per", "ipg";
|
||||
assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
|
|
@ -370,8 +370,8 @@ dma_subsys: bus@5a000000 {
|
|||
reg = <0x5a890000 0x10000>;
|
||||
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&adc1_lpcg 0>,
|
||||
<&adc1_lpcg 1>;
|
||||
clocks = <&adc1_lpcg IMX_LPCG_CLK_0>,
|
||||
<&adc1_lpcg IMX_LPCG_CLK_4>;
|
||||
clock-names = "per", "ipg";
|
||||
assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
|
|
@ -384,8 +384,8 @@ dma_subsys: bus@5a000000 {
|
|||
reg = <0x5a8d0000 0x10000>;
|
||||
interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&can0_lpcg 1>,
|
||||
<&can0_lpcg 0>;
|
||||
clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
|
||||
<&can0_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "per";
|
||||
assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
|
|
@ -405,8 +405,8 @@ dma_subsys: bus@5a000000 {
|
|||
* CAN1 shares CAN0's clock and to enable CAN0's clock it
|
||||
* has to be powered on.
|
||||
*/
|
||||
clocks = <&can0_lpcg 1>,
|
||||
<&can0_lpcg 0>;
|
||||
clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
|
||||
<&can0_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "per";
|
||||
assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
|
|
@ -426,8 +426,8 @@ dma_subsys: bus@5a000000 {
|
|||
* CAN2 shares CAN0's clock and to enable CAN0's clock it
|
||||
* has to be powered on.
|
||||
*/
|
||||
clocks = <&can0_lpcg 1>,
|
||||
<&can0_lpcg 0>;
|
||||
clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
|
||||
<&can0_lpcg IMX_LPCG_CLK_0>;
|
||||
clock-names = "ipg", "per";
|
||||
assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@ lsio_subsys: bus@5d000000 {
|
|||
compatible = "fsl,imx27-pwm";
|
||||
reg = <0x5d000000 0x10000>;
|
||||
clock-names = "ipg", "per";
|
||||
clocks = <&pwm0_lpcg 4>,
|
||||
<&pwm0_lpcg 1>;
|
||||
clocks = <&pwm0_lpcg IMX_LPCG_CLK_6>,
|
||||
<&pwm0_lpcg IMX_LPCG_CLK_1>;
|
||||
assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
#pwm-cells = <3>;
|
||||
|
|
@ -38,8 +38,8 @@ lsio_subsys: bus@5d000000 {
|
|||
compatible = "fsl,imx27-pwm";
|
||||
reg = <0x5d010000 0x10000>;
|
||||
clock-names = "ipg", "per";
|
||||
clocks = <&pwm1_lpcg 4>,
|
||||
<&pwm1_lpcg 1>;
|
||||
clocks = <&pwm1_lpcg IMX_LPCG_CLK_6>,
|
||||
<&pwm1_lpcg IMX_LPCG_CLK_1>;
|
||||
assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
#pwm-cells = <3>;
|
||||
|
|
@ -51,8 +51,8 @@ lsio_subsys: bus@5d000000 {
|
|||
compatible = "fsl,imx27-pwm";
|
||||
reg = <0x5d020000 0x10000>;
|
||||
clock-names = "ipg", "per";
|
||||
clocks = <&pwm2_lpcg 4>,
|
||||
<&pwm2_lpcg 1>;
|
||||
clocks = <&pwm2_lpcg IMX_LPCG_CLK_6>,
|
||||
<&pwm2_lpcg IMX_LPCG_CLK_1>;
|
||||
assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
#pwm-cells = <3>;
|
||||
|
|
@ -64,8 +64,8 @@ lsio_subsys: bus@5d000000 {
|
|||
compatible = "fsl,imx27-pwm";
|
||||
reg = <0x5d030000 0x10000>;
|
||||
clock-names = "ipg", "per";
|
||||
clocks = <&pwm3_lpcg 4>,
|
||||
<&pwm3_lpcg 1>;
|
||||
clocks = <&pwm3_lpcg IMX_LPCG_CLK_6>,
|
||||
<&pwm3_lpcg IMX_LPCG_CLK_1>;
|
||||
assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
#pwm-cells = <3>;
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
pinctrl-0 = <&pinctrl_usbcon1>;
|
||||
type = "micro";
|
||||
label = "otg";
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
|
|
@ -183,7 +184,6 @@
|
|||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
pinctrl-0 = <&pinctrl_usbcon1>;
|
||||
type = "micro";
|
||||
label = "otg";
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
|
|
@ -202,7 +203,6 @@
|
|||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1672,7 +1672,7 @@
|
|||
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
|
||||
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
|
||||
clock-names = "pclk", "wrap", "phy", "axi";
|
||||
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,
|
||||
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>,
|
||||
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
|
||||
<&clk IMX8MP_CLK_24M>;
|
||||
|
|
|
|||
|
|
@ -153,15 +153,15 @@
|
|||
};
|
||||
|
||||
&flexcan2 {
|
||||
clocks = <&can1_lpcg 1>,
|
||||
<&can1_lpcg 0>;
|
||||
clocks = <&can1_lpcg IMX_LPCG_CLK_4>,
|
||||
<&can1_lpcg IMX_LPCG_CLK_0>;
|
||||
assigned-clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>;
|
||||
fsl,clk-source = /bits/ 8 <1>;
|
||||
};
|
||||
|
||||
&flexcan3 {
|
||||
clocks = <&can2_lpcg 1>,
|
||||
<&can2_lpcg 0>;
|
||||
clocks = <&can2_lpcg IMX_LPCG_CLK_4>,
|
||||
<&can2_lpcg IMX_LPCG_CLK_0>;
|
||||
assigned-clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>;
|
||||
fsl,clk-source = /bits/ 8 <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -129,7 +129,7 @@
|
|||
};
|
||||
|
||||
&pio {
|
||||
eth_default: eth_default {
|
||||
eth_default: eth-default-pins {
|
||||
tx_pins {
|
||||
pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
|
||||
<MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
|
||||
|
|
@ -156,7 +156,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
eth_sleep: eth_sleep {
|
||||
eth_sleep: eth-sleep-pins {
|
||||
tx_pins {
|
||||
pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
|
||||
<MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
|
||||
|
|
@ -182,14 +182,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
usb0_id_pins_float: usb0_iddig {
|
||||
usb0_id_pins_float: usb0-iddig-pins {
|
||||
pins_iddig {
|
||||
pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
usb1_id_pins_float: usb1_iddig {
|
||||
usb1_id_pins_float: usb1-iddig-pins {
|
||||
pins_iddig {
|
||||
pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
|
||||
bias-pull-up;
|
||||
|
|
|
|||
|
|
@ -249,10 +249,11 @@
|
|||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
infracfg: syscon@10001000 {
|
||||
infracfg: clock-controller@10001000 {
|
||||
compatible = "mediatek,mt2712-infracfg", "syscon";
|
||||
reg = <0 0x10001000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
pericfg: syscon@10003000 {
|
||||
|
|
|
|||
|
|
@ -252,7 +252,7 @@
|
|||
clock-names = "hif_sel";
|
||||
};
|
||||
|
||||
cir: cir@10009000 {
|
||||
cir: ir-receiver@10009000 {
|
||||
compatible = "mediatek,mt7622-cir";
|
||||
reg = <0 0x10009000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
|
@ -283,16 +283,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
apmixedsys: apmixedsys@10209000 {
|
||||
compatible = "mediatek,mt7622-apmixedsys",
|
||||
"syscon";
|
||||
apmixedsys: clock-controller@10209000 {
|
||||
compatible = "mediatek,mt7622-apmixedsys";
|
||||
reg = <0 0x10209000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
topckgen: topckgen@10210000 {
|
||||
compatible = "mediatek,mt7622-topckgen",
|
||||
"syscon";
|
||||
topckgen: clock-controller@10210000 {
|
||||
compatible = "mediatek,mt7622-topckgen";
|
||||
reg = <0 0x10210000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
|
@ -515,7 +513,6 @@
|
|||
<&pericfg CLK_PERI_AUXADC_PD>;
|
||||
clock-names = "therm", "auxadc";
|
||||
resets = <&pericfg MT7622_PERI_THERM_SW_RST>;
|
||||
reset-names = "therm";
|
||||
mediatek,auxadc = <&auxadc>;
|
||||
mediatek,apmixedsys = <&apmixedsys>;
|
||||
nvmem-cells = <&thermal_calibration>;
|
||||
|
|
@ -734,9 +731,8 @@
|
|||
power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>;
|
||||
};
|
||||
|
||||
ssusbsys: ssusbsys@1a000000 {
|
||||
compatible = "mediatek,mt7622-ssusbsys",
|
||||
"syscon";
|
||||
ssusbsys: clock-controller@1a000000 {
|
||||
compatible = "mediatek,mt7622-ssusbsys";
|
||||
reg = <0 0x1a000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
|
@ -793,9 +789,8 @@
|
|||
};
|
||||
};
|
||||
|
||||
pciesys: pciesys@1a100800 {
|
||||
compatible = "mediatek,mt7622-pciesys",
|
||||
"syscon";
|
||||
pciesys: clock-controller@1a100800 {
|
||||
compatible = "mediatek,mt7622-pciesys";
|
||||
reg = <0 0x1a100800 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
|
@ -921,12 +916,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
hifsys: syscon@1af00000 {
|
||||
compatible = "mediatek,mt7622-hifsys", "syscon";
|
||||
hifsys: clock-controller@1af00000 {
|
||||
compatible = "mediatek,mt7622-hifsys";
|
||||
reg = <0 0x1af00000 0 0x70>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
ethsys: syscon@1b000000 {
|
||||
ethsys: clock-controller@1b000000 {
|
||||
compatible = "mediatek,mt7622-ethsys",
|
||||
"syscon";
|
||||
reg = <0 0x1b000000 0 0x1000>;
|
||||
|
|
@ -966,9 +962,7 @@
|
|||
};
|
||||
|
||||
eth: ethernet@1b100000 {
|
||||
compatible = "mediatek,mt7622-eth",
|
||||
"mediatek,mt2701-eth",
|
||||
"syscon";
|
||||
compatible = "mediatek,mt7622-eth";
|
||||
reg = <0 0x1b100000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>,
|
||||
|
|
|
|||
|
|
@ -146,19 +146,19 @@
|
|||
|
||||
&cpu_thermal {
|
||||
cooling-maps {
|
||||
cpu-active-high {
|
||||
map-cpu-active-high {
|
||||
/* active: set fan to cooling level 2 */
|
||||
cooling-device = <&fan 2 2>;
|
||||
trip = <&cpu_trip_active_high>;
|
||||
};
|
||||
|
||||
cpu-active-med {
|
||||
map-cpu-active-med {
|
||||
/* active: set fan to cooling level 1 */
|
||||
cooling-device = <&fan 1 1>;
|
||||
trip = <&cpu_trip_active_med>;
|
||||
};
|
||||
|
||||
cpu-active-low {
|
||||
map-cpu-active-low {
|
||||
/* active: set fan to cooling level 0 */
|
||||
cooling-device = <&fan 0 0>;
|
||||
trip = <&cpu_trip_active_low>;
|
||||
|
|
|
|||
|
|
@ -332,9 +332,8 @@
|
|||
reg = <0 0x1100c800 0 0x800>;
|
||||
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_THERM_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_26M_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_FRC_CK>;
|
||||
clock-names = "therm", "auxadc", "adc_32k";
|
||||
<&infracfg CLK_INFRA_ADC_26M_CK>;
|
||||
clock-names = "therm", "auxadc";
|
||||
nvmem-cells = <&thermal_calibration>;
|
||||
nvmem-cell-names = "calibration-data";
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
|
@ -492,8 +491,6 @@
|
|||
compatible = "mediatek,mt7986-ethsys",
|
||||
"syscon";
|
||||
reg = <0 0x15000000 0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
|
@ -556,7 +553,6 @@
|
|||
<&topckgen CLK_TOP_SGM_325M_SEL>;
|
||||
assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
|
||||
<&apmixedsys CLK_APMIXED_SGMPLL>;
|
||||
#reset-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mediatek,ethsys = <ðsys>;
|
||||
|
|
|
|||
|
|
@ -433,7 +433,6 @@
|
|||
};
|
||||
|
||||
&mt6358_vgpu_reg {
|
||||
regulator-min-microvolt = <625000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
|
||||
regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
|
||||
|
|
|
|||
|
|
@ -1637,6 +1637,7 @@
|
|||
compatible = "mediatek,mt8183-mfgcfg", "syscon";
|
||||
reg = <0 0x13000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
|
||||
};
|
||||
|
||||
gpu: gpu@13040000 {
|
||||
|
|
|
|||
|
|
@ -1296,7 +1296,7 @@
|
|||
* regulator coupling requirements.
|
||||
*/
|
||||
regulator-name = "ppvar_dvdd_vgpu";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <6250>;
|
||||
regulator-enable-ramp-delay = <200>;
|
||||
|
|
|
|||
|
|
@ -1421,7 +1421,7 @@
|
|||
mt6315_6_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vbcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
|
|
@ -1431,7 +1431,7 @@
|
|||
mt6315_6_vbuck3: vbuck3 {
|
||||
regulator-compatible = "vbuck3";
|
||||
regulator-name = "Vlcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
|
|
@ -1448,7 +1448,7 @@
|
|||
mt6315_7_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vgpu";
|
||||
regulator-min-microvolt = <606250>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
|
|
|
|||
|
|
@ -1464,6 +1464,7 @@
|
|||
reg = <0 0x14001000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
|
||||
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
|
||||
mediatek,gce-events = <CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0>,
|
||||
<CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1>;
|
||||
power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
|
||||
|
|
|
|||
|
|
@ -264,6 +264,38 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
cpu-supply = <&mt6359_vcore_buck_reg>;
|
||||
};
|
||||
|
||||
&cpu4 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&cpu5 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&cpu6 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&cpu7 {
|
||||
cpu-supply = <&mt6315_6_vbuck1>;
|
||||
};
|
||||
|
||||
&dp_intf0 {
|
||||
status = "okay";
|
||||
|
||||
|
|
@ -1214,7 +1246,7 @@
|
|||
mt6315_6_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vbcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-ramp-delay = <6250>;
|
||||
|
|
@ -1232,7 +1264,7 @@
|
|||
mt6315_7_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vgpu";
|
||||
regulator-min-microvolt = <625000>;
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-ramp-delay = <6250>;
|
||||
|
|
|
|||
|
|
@ -2028,6 +2028,7 @@
|
|||
compatible = "mediatek,mt8195-vppsys0", "syscon";
|
||||
reg = <0 0x14000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
|
||||
};
|
||||
|
||||
dma-controller@14001000 {
|
||||
|
|
@ -2251,6 +2252,7 @@
|
|||
compatible = "mediatek,mt8195-vppsys1", "syscon";
|
||||
reg = <0 0x14f00000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
|
||||
};
|
||||
|
||||
mutex@14f01000 {
|
||||
|
|
@ -3080,6 +3082,7 @@
|
|||
reg = <0 0x1c01a000 0 0x1000>;
|
||||
mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
|
||||
#clock-cells = <1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -3261,6 +3264,7 @@
|
|||
interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
|
||||
clocks = <&vdosys0 CLK_VDO0_DISP_MUTEX0>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
|
||||
mediatek,gce-events = <CMDQ_EVENT_VDO0_DISP_STREAM_DONE_0>;
|
||||
};
|
||||
|
||||
|
|
@ -3331,6 +3335,7 @@
|
|||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>;
|
||||
clock-names = "vdo1_mutex";
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
|
||||
mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -3707,7 +3707,7 @@
|
|||
compatible = "qcom,sc7280-adsp-pas";
|
||||
reg = <0 0x03700000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -3944,7 +3944,7 @@
|
|||
compatible = "qcom,sc7280-cdsp-pas";
|
||||
reg = <0 0x0a300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -2701,7 +2701,7 @@
|
|||
resets = <&gcc GCC_USB30_SEC_BCR>;
|
||||
power-domains = <&gcc USB30_SEC_GDSC>;
|
||||
interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 10 IRQ_TYPE_EDGE_BOTH>,
|
||||
<&pdc 11 IRQ_TYPE_EDGE_BOTH>;
|
||||
interrupt-names = "hs_phy_irq", "ss_phy_irq",
|
||||
|
|
|
|||
|
|
@ -1774,6 +1774,7 @@
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_4_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie4_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -1872,6 +1873,7 @@
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_3B_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie3b_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -1970,6 +1972,7 @@
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_3A_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie3a_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -2071,6 +2074,7 @@
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_2B_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie2b_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -2169,6 +2173,7 @@
|
|||
reset-names = "pci";
|
||||
|
||||
power-domains = <&gcc PCIE_2A_GDSC>;
|
||||
required-opps = <&rpmhpd_opp_nom>;
|
||||
|
||||
phys = <&pcie2a_phy>;
|
||||
phy-names = "pciephy";
|
||||
|
|
@ -2641,7 +2646,7 @@
|
|||
compatible = "qcom,sc8280xp-adsp-pas";
|
||||
reg = <0 0x03000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -4977,7 +4982,7 @@
|
|||
compatible = "qcom,sc8280xp-nsp0-pas";
|
||||
reg = <0 0x1b300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp0_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp0_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -5108,7 +5113,7 @@
|
|||
compatible = "qcom,sc8280xp-nsp1-pas";
|
||||
reg = <0 0x21300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp1_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_nsp1_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -1252,7 +1252,7 @@
|
|||
compatible = "qcom,sm6350-adsp-pas";
|
||||
reg = <0 0x03000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -1511,7 +1511,7 @@
|
|||
compatible = "qcom,sm6350-cdsp-pas";
|
||||
reg = <0 0x08300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -1561,7 +1561,7 @@
|
|||
compatible = "qcom,sm6375-adsp-pas";
|
||||
reg = <0 0x0a400000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -3062,7 +3062,7 @@
|
|||
compatible = "qcom,sm8250-slpi-pas";
|
||||
reg = <0 0x05c00000 0 0x4000>;
|
||||
|
||||
interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -3766,7 +3766,7 @@
|
|||
compatible = "qcom,sm8250-cdsp-pas";
|
||||
reg = <0 0x08300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
@ -5928,7 +5928,7 @@
|
|||
compatible = "qcom,sm8250-adsp-pas";
|
||||
reg = <0 0x17300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
|
|
|
|||
|
|
@ -1777,12 +1777,8 @@
|
|||
ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
|
||||
|
||||
/*
|
||||
* MSIs for BDF (1:0.0) only works with Device ID 0x5980.
|
||||
* Hence, the IDs are swapped.
|
||||
*/
|
||||
msi-map = <0x0 &gic_its 0x5981 0x1>,
|
||||
<0x100 &gic_its 0x5980 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x5980 0x1>,
|
||||
<0x100 &gic_its 0x5981 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1900,12 +1896,8 @@
|
|||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
/*
|
||||
* MSIs for BDF (1:0.0) only works with Device ID 0x5a00.
|
||||
* Hence, the IDs are swapped.
|
||||
*/
|
||||
msi-map = <0x0 &gic_its 0x5a01 0x1>,
|
||||
<0x100 &gic_its 0x5a00 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x5a00 0x1>,
|
||||
<0x100 &gic_its 0x5a01 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
|
|||
|
|
@ -1755,9 +1755,8 @@
|
|||
<&gem_noc MASTER_APPSS_PROC 0 &cnoc_main SLAVE_PCIE_0 0>;
|
||||
interconnect-names = "pcie-mem", "cpu-pcie";
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1401 0x1>,
|
||||
<0x100 &gic_its 0x1400 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1400 0x1>,
|
||||
<0x100 &gic_its 0x1401 0x1>;
|
||||
iommu-map = <0x0 &apps_smmu 0x1400 0x1>,
|
||||
<0x100 &apps_smmu 0x1401 0x1>;
|
||||
|
||||
|
|
@ -1867,9 +1866,8 @@
|
|||
<&gem_noc MASTER_APPSS_PROC 0 &cnoc_main SLAVE_PCIE_1 0>;
|
||||
interconnect-names = "pcie-mem", "cpu-pcie";
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1481 0x1>,
|
||||
<0x100 &gic_its 0x1480 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1480 0x1>,
|
||||
<0x100 &gic_its 0x1481 0x1>;
|
||||
iommu-map = <0x0 &apps_smmu 0x1480 0x1>,
|
||||
<0x100 &apps_smmu 0x1481 0x1>;
|
||||
|
||||
|
|
|
|||
|
|
@ -2274,9 +2274,8 @@
|
|||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1401 0x1>,
|
||||
<0x100 &gic_its 0x1400 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1400 0x1>,
|
||||
<0x100 &gic_its 0x1401 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
|
||||
linux,pci-domain = <0>;
|
||||
|
|
@ -2402,9 +2401,8 @@
|
|||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Entries are reversed due to the unusual ITS DeviceID encoding */
|
||||
msi-map = <0x0 &gic_its 0x1481 0x1>,
|
||||
<0x100 &gic_its 0x1480 0x1>;
|
||||
msi-map = <0x0 &gic_its 0x1480 0x1>,
|
||||
<0x100 &gic_its 0x1481 0x1>;
|
||||
msi-map-mask = <0xff00>;
|
||||
|
||||
linux,pci-domain = <1>;
|
||||
|
|
|
|||
|
|
@ -284,7 +284,7 @@
|
|||
|
||||
domain-idle-states {
|
||||
CLUSTER_CL4: cluster-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
compatible = "domain-idle-state";
|
||||
idle-state-name = "l2-ret";
|
||||
arm,psci-suspend-param = <0x01000044>;
|
||||
entry-latency-us = <350>;
|
||||
|
|
@ -293,7 +293,7 @@
|
|||
};
|
||||
|
||||
CLUSTER_CL5: cluster-sleep-1 {
|
||||
compatible = "arm,idle-state";
|
||||
compatible = "domain-idle-state";
|
||||
idle-state-name = "ret-pll-off";
|
||||
arm,psci-suspend-param = <0x01000054>;
|
||||
entry-latency-us = <2200>;
|
||||
|
|
|
|||
|
|
@ -663,7 +663,7 @@ camera: &i2c7 {
|
|||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
mipi1_in_panel: endpoint@1 {
|
||||
mipi1_in_panel: endpoint {
|
||||
remote-endpoint = <&mipi1_out_panel>;
|
||||
};
|
||||
};
|
||||
|
|
@ -689,7 +689,6 @@ camera: &i2c7 {
|
|||
ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
/* PERST# asserted in S3 */
|
||||
pcie-reset-suspend = <1>;
|
||||
|
||||
vpcie3v3-supply = <&wlan_3v3>;
|
||||
vpcie1v8-supply = <&pp1800_pcie>;
|
||||
|
|
|
|||
|
|
@ -611,7 +611,7 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
interface@0 { /* interface 0 of configuration 1 */
|
||||
compatible = "usbbda,8156.config1.0";
|
||||
compatible = "usbifbda,8156.config1.0";
|
||||
reg = <0 1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -779,7 +779,6 @@
|
|||
};
|
||||
|
||||
&pcie0 {
|
||||
bus-scan-delay-ms = <1000>;
|
||||
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -194,6 +194,8 @@
|
|||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
||||
vpcie3v3-supply = <&vcc3v3_baseboard>;
|
||||
vpcie12v-supply = <&dc_12v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,26 @@
|
|||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcca_0v9: vcca-0v9-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcca_0v9";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
vcca_1v8: vcca-1v8-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
vdd_log: vdd-log {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm2 0 25000 1>;
|
||||
|
|
@ -416,16 +436,28 @@
|
|||
gpio1830-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmu1830-supply = <&vcc_1v8>;
|
||||
&pcie0 {
|
||||
/* PCIe PHY supplies */
|
||||
vpcie0v9-supply = <&vcca_0v9>;
|
||||
vpcie1v8-supply = <&vcca_1v8>;
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
&pcie_clkreqn_cpm {
|
||||
rockchip,pins =
|
||||
<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&q7_thermal_pin>;
|
||||
|
||||
gpios {
|
||||
q7_thermal_pin: q7-thermal-pin {
|
||||
rockchip,pins =
|
||||
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c8 {
|
||||
i2c8_xfer_a: i2c8-xfer {
|
||||
rockchip,pins =
|
||||
|
|
@ -458,11 +490,20 @@
|
|||
usb3 {
|
||||
usb3_id: usb3-id {
|
||||
rockchip,pins =
|
||||
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmu1830-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
/*
|
||||
* Signal integrity isn't great at 200MHz but 100MHz has proven stable
|
||||
|
|
|
|||
|
|
@ -447,7 +447,6 @@
|
|||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -416,6 +416,8 @@
|
|||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
|
|
@ -525,9 +527,9 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <0>;
|
||||
reg = <0x1f>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -523,7 +523,6 @@
|
|||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_mini_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -216,9 +216,9 @@
|
|||
pinctrl-0 = <&i2c7m0_xfer>;
|
||||
status = "okay";
|
||||
|
||||
es8316: audio-codec@11 {
|
||||
es8316: audio-codec@10 {
|
||||
compatible = "everest,es8316";
|
||||
reg = <0x11>;
|
||||
reg = <0x10>;
|
||||
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue