linux-can-next-for-6.9-20240220
-----BEGIN PGP SIGNATURE----- iQFHBAABCgAxFiEEUEC6huC2BN0pvD5fKDiiPnotvG8FAmXUZiITHG1rbEBwZW5n dXRyb25peC5kZQAKCRAoOKI+ei28b8KLB/9MKkUjbbBh9nXezyWdXnulj5jpHWlJ Xa7Sz7e+Gw5HbpK1/RF3Mb3/uf5D+DTMa2jjUJhezGCugW6ugoFapDC1bJxdafIN pAZQG/7EYi4TqHEO3/aS5sMh3pISs29COnmHHdQCYfyTMZPKGcDkJuwa7POhHhR1 zrjavD0N2ihBfhoadlT+GQ9QYu+JyWnjrB27hSznsktW9Jeju1u6F9nvOXn60aZU e7QXgsKe94YXLEed3hj7buPAIirY+tLKIpbw7TtJJwk6EBnnK17S+2wydR0N7yWK SSsaKJxZCiiaoYkl9chkKTyqh2I3qa/HsxUrFY3TGx5VMhWLiiH/r5eI =pIjg -----END PGP SIGNATURE----- Merge tag 'linux-can-next-for-6.9-20240220' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2024-02-20 this is a pull request of 9 patches for net-next/master. The first patch is by Francesco Dolcini and removes a redundant check for pm_clock_support from the m_can driver. Martin Hundebøll contributes 3 patches to the m_can/tcan4x5x driver to allow resume upon RX of a CAN frame. 3 patches by Srinivas Goud add support for ECC statistics to the xilinx_can driver. The last 2 patches are by Oliver Hartkopp and me, target the CAN RAW protocol and fix an error in the getsockopt() for CAN-XL introduced in the previous pull request to net-next (linux-can-next-for-6.9-20240213). linux-can-next-for-6.9-20240220 * tag 'linux-can-next-for-6.9-20240220' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next: can: raw: raw_getsockopt(): reduce scope of err can: raw: fix getsockopt() for new CAN_RAW_XL_VCID_OPTS can: xilinx_can: Add ethtool stats interface for ECC errors can: xilinx_can: Add ECC support dt-bindings: can: xilinx_can: Add 'xlnx,has-ecc' optional property can: tcan4x5x: support resuming from rx interrupt signal can: m_can: allow keeping the transceiver running in suspend dt-bindings: can: tcan4x5x: Document the wakeup-source flag can: m_can: remove redundant check for pm_clock_support ==================== Link: https://lore.kernel.org/r/20240220085130.2936533-1-mkl@pengutronix.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
commit
4934446297
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@ -28,6 +28,8 @@ Optional properties:
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available with tcan4552/4553.
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- device-wake-gpios: Wake up GPIO to wake up the TCAN device. Not
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available with tcan4552/4553.
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- wakeup-source: Leave the chip running when suspended, and configure
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the RX interrupt to wake up the device.
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Example:
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tcan4x5x: tcan4x5x@0 {
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@ -42,4 +44,5 @@ tcan4x5x: tcan4x5x@0 {
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device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
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device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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wakeup-source;
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};
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@ -49,6 +49,10 @@ properties:
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resets:
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maxItems: 1
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xlnx,has-ecc:
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$ref: /schemas/types.yaml#/definitions/flag
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description: CAN TX_OL, TX_TL and RX FIFOs have ECC support(AXI CAN)
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required:
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- compatible
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- reg
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@ -137,6 +141,7 @@ examples:
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interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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xlnx,has-ecc;
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};
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- |
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@ -2312,11 +2312,9 @@ int m_can_class_register(struct m_can_classdev *cdev)
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}
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}
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if (cdev->pm_clock_support) {
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ret = m_can_clk_start(cdev);
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if (ret)
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return ret;
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}
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ret = m_can_clk_start(cdev);
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if (ret)
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return ret;
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if (cdev->is_peripheral) {
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ret = can_rx_offload_add_manual(cdev->net, &cdev->offload,
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@ -2384,7 +2382,15 @@ int m_can_class_suspend(struct device *dev)
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if (netif_running(ndev)) {
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netif_stop_queue(ndev);
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netif_device_detach(ndev);
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m_can_stop(ndev);
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/* leave the chip running with rx interrupt enabled if it is
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* used as a wake-up source.
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*/
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if (cdev->pm_wake_source)
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m_can_write(cdev, M_CAN_IE, IR_RF0N);
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else
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m_can_stop(ndev);
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m_can_clk_stop(cdev);
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}
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@ -2411,11 +2417,15 @@ int m_can_class_resume(struct device *dev)
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ret = m_can_clk_start(cdev);
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if (ret)
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return ret;
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ret = m_can_start(ndev);
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if (ret) {
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m_can_clk_stop(cdev);
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return ret;
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if (cdev->pm_wake_source) {
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m_can_write(cdev, M_CAN_IE, cdev->active_interrupts);
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} else {
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ret = m_can_start(ndev);
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if (ret) {
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m_can_clk_stop(cdev);
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return ret;
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}
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}
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netif_device_attach(ndev);
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@ -97,6 +97,7 @@ struct m_can_classdev {
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u32 irqstatus;
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int pm_clock_support;
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int pm_wake_source;
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int is_peripheral;
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// Cached M_CAN_IE register content
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@ -125,6 +125,7 @@ static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
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mcan_class->dev = &pci->dev;
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mcan_class->net->irq = pci_irq_vector(pci, 0);
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mcan_class->pm_clock_support = 1;
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mcan_class->pm_wake_source = 0;
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mcan_class->can.clock.freq = id->driver_data;
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mcan_class->ops = &m_can_pci_ops;
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@ -139,6 +139,7 @@ static int m_can_plat_probe(struct platform_device *pdev)
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mcan_class->net->irq = irq;
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mcan_class->pm_clock_support = 1;
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mcan_class->pm_wake_source = 0;
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mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk);
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mcan_class->dev = &pdev->dev;
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mcan_class->transceiver = transceiver;
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@ -411,6 +411,7 @@ static int tcan4x5x_can_probe(struct spi_device *spi)
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priv->spi = spi;
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mcan_class->pm_clock_support = 0;
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mcan_class->pm_wake_source = device_property_read_bool(&spi->dev, "wakeup-source");
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mcan_class->can.clock.freq = freq;
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mcan_class->dev = &spi->dev;
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mcan_class->ops = &tcan4x5x_ops;
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@ -459,6 +460,9 @@ static int tcan4x5x_can_probe(struct spi_device *spi)
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goto out_power;
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}
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if (mcan_class->pm_wake_source)
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device_init_wakeup(&spi->dev, true);
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ret = m_can_class_register(mcan_class);
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if (ret) {
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dev_err(&spi->dev, "Failed registering m_can device %pe\n",
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@ -487,6 +491,29 @@ static void tcan4x5x_can_remove(struct spi_device *spi)
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m_can_class_free_dev(priv->cdev.net);
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}
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static int __maybe_unused tcan4x5x_suspend(struct device *dev)
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{
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struct m_can_classdev *cdev = dev_get_drvdata(dev);
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struct spi_device *spi = to_spi_device(dev);
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if (cdev->pm_wake_source)
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enable_irq_wake(spi->irq);
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return m_can_class_suspend(dev);
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}
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static int __maybe_unused tcan4x5x_resume(struct device *dev)
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{
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struct m_can_classdev *cdev = dev_get_drvdata(dev);
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struct spi_device *spi = to_spi_device(dev);
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int ret = m_can_class_resume(dev);
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if (cdev->pm_wake_source)
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disable_irq_wake(spi->irq);
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return ret;
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}
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static const struct of_device_id tcan4x5x_of_match[] = {
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{
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.compatible = "ti,tcan4x5x",
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@ -505,11 +532,15 @@ static const struct spi_device_id tcan4x5x_id_table[] = {
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};
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MODULE_DEVICE_TABLE(spi, tcan4x5x_id_table);
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static const struct dev_pm_ops tcan4x5x_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(tcan4x5x_suspend, tcan4x5x_resume)
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};
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static struct spi_driver tcan4x5x_can_driver = {
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = tcan4x5x_of_match,
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.pm = NULL,
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.pm = &tcan4x5x_pm_ops,
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},
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.id_table = tcan4x5x_id_table,
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.probe = tcan4x5x_can_probe,
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@ -31,6 +31,7 @@
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#include <linux/phy/phy.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/u64_stats_sync.h>
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#define DRIVER_NAME "xilinx_can"
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@ -58,6 +59,13 @@ enum xcan_reg {
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*/
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XCAN_F_BTR_OFFSET = 0x08C, /* Data Phase Bit Timing */
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XCAN_TRR_OFFSET = 0x0090, /* TX Buffer Ready Request */
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/* only on AXI CAN cores */
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XCAN_ECC_CFG_OFFSET = 0xC8, /* ECC Configuration */
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XCAN_TXTLFIFO_ECC_OFFSET = 0xCC, /* TXTL FIFO ECC error counter */
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XCAN_TXOLFIFO_ECC_OFFSET = 0xD0, /* TXOL FIFO ECC error counter */
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XCAN_RXFIFO_ECC_OFFSET = 0xD4, /* RX FIFO ECC error counter */
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XCAN_AFR_EXT_OFFSET = 0x00E0, /* Acceptance Filter */
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XCAN_FSR_OFFSET = 0x00E8, /* RX FIFO Status */
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XCAN_TXMSG_BASE_OFFSET = 0x0100, /* TX Message Space */
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@ -124,6 +132,18 @@ enum xcan_reg {
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#define XCAN_IXR_TXFLL_MASK 0x00000004 /* Tx FIFO Full intr */
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#define XCAN_IXR_TXOK_MASK 0x00000002 /* TX successful intr */
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#define XCAN_IXR_ARBLST_MASK 0x00000001 /* Arbitration lost intr */
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#define XCAN_IXR_E2BERX_MASK BIT(23) /* RX FIFO two bit ECC error */
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#define XCAN_IXR_E1BERX_MASK BIT(22) /* RX FIFO one bit ECC error */
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#define XCAN_IXR_E2BETXOL_MASK BIT(21) /* TXOL FIFO two bit ECC error */
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#define XCAN_IXR_E1BETXOL_MASK BIT(20) /* TXOL FIFO One bit ECC error */
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#define XCAN_IXR_E2BETXTL_MASK BIT(19) /* TXTL FIFO Two bit ECC error */
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#define XCAN_IXR_E1BETXTL_MASK BIT(18) /* TXTL FIFO One bit ECC error */
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#define XCAN_IXR_ECC_MASK (XCAN_IXR_E2BERX_MASK | \
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XCAN_IXR_E1BERX_MASK | \
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XCAN_IXR_E2BETXOL_MASK | \
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XCAN_IXR_E1BETXOL_MASK | \
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XCAN_IXR_E2BETXTL_MASK | \
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XCAN_IXR_E1BETXTL_MASK)
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#define XCAN_IDR_ID1_MASK 0xFFE00000 /* Standard msg identifier */
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#define XCAN_IDR_SRR_MASK 0x00100000 /* Substitute remote TXreq */
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#define XCAN_IDR_IDE_MASK 0x00080000 /* Identifier extension */
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@ -137,6 +157,11 @@ enum xcan_reg {
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#define XCAN_2_FSR_RI_MASK 0x0000003F /* RX Read Index */
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#define XCAN_DLCR_EDL_MASK 0x08000000 /* EDL Mask in DLC */
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#define XCAN_DLCR_BRS_MASK 0x04000000 /* BRS Mask in DLC */
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#define XCAN_ECC_CFG_REECRX_MASK BIT(2) /* Reset RX FIFO ECC error counters */
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#define XCAN_ECC_CFG_REECTXOL_MASK BIT(1) /* Reset TXOL FIFO ECC error counters */
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#define XCAN_ECC_CFG_REECTXTL_MASK BIT(0) /* Reset TXTL FIFO ECC error counters */
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#define XCAN_ECC_1BIT_CNT_MASK GENMASK(15, 0) /* FIFO ECC 1bit count mask */
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#define XCAN_ECC_2BIT_CNT_MASK GENMASK(31, 16) /* FIFO ECC 2bit count mask */
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/* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */
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#define XCAN_BRPR_TDC_ENABLE BIT(16) /* Transmitter Delay Compensation (TDC) Enable */
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@ -202,6 +227,14 @@ struct xcan_devtype_data {
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* @devtype: Device type specific constants
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* @transceiver: Optional pointer to associated CAN transceiver
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* @rstc: Pointer to reset control
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* @ecc_enable: ECC enable flag
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* @syncp: synchronization for ECC error stats
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* @ecc_rx_2_bit_errors: RXFIFO 2bit ECC count
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* @ecc_rx_1_bit_errors: RXFIFO 1bit ECC count
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* @ecc_txol_2_bit_errors: TXOLFIFO 2bit ECC count
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* @ecc_txol_1_bit_errors: TXOLFIFO 1bit ECC count
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* @ecc_txtl_2_bit_errors: TXTLFIFO 2bit ECC count
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* @ecc_txtl_1_bit_errors: TXTLFIFO 1bit ECC count
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*/
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struct xcan_priv {
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struct can_priv can;
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@ -221,6 +254,14 @@ struct xcan_priv {
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struct xcan_devtype_data devtype;
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struct phy *transceiver;
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struct reset_control *rstc;
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bool ecc_enable;
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struct u64_stats_sync syncp;
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u64_stats_t ecc_rx_2_bit_errors;
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u64_stats_t ecc_rx_1_bit_errors;
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u64_stats_t ecc_txol_2_bit_errors;
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u64_stats_t ecc_txol_1_bit_errors;
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u64_stats_t ecc_txtl_2_bit_errors;
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u64_stats_t ecc_txtl_1_bit_errors;
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};
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/* CAN Bittiming constants as per Xilinx CAN specs */
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@ -308,6 +349,24 @@ static const struct can_tdc_const xcan_tdc_const_canfd2 = {
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.tdcf_max = 0,
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};
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enum xcan_stats_type {
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XCAN_ECC_RX_2_BIT_ERRORS,
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XCAN_ECC_RX_1_BIT_ERRORS,
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XCAN_ECC_TXOL_2_BIT_ERRORS,
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XCAN_ECC_TXOL_1_BIT_ERRORS,
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XCAN_ECC_TXTL_2_BIT_ERRORS,
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XCAN_ECC_TXTL_1_BIT_ERRORS,
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};
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static const char xcan_priv_flags_strings[][ETH_GSTRING_LEN] = {
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[XCAN_ECC_RX_2_BIT_ERRORS] = "ecc_rx_2_bit_errors",
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[XCAN_ECC_RX_1_BIT_ERRORS] = "ecc_rx_1_bit_errors",
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[XCAN_ECC_TXOL_2_BIT_ERRORS] = "ecc_txol_2_bit_errors",
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[XCAN_ECC_TXOL_1_BIT_ERRORS] = "ecc_txol_1_bit_errors",
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[XCAN_ECC_TXTL_2_BIT_ERRORS] = "ecc_txtl_2_bit_errors",
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[XCAN_ECC_TXTL_1_BIT_ERRORS] = "ecc_txtl_1_bit_errors",
|
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};
|
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|
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/**
|
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* xcan_write_reg_le - Write a value to the device register little endian
|
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* @priv: Driver private data structure
|
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|
@ -523,6 +582,9 @@ static int xcan_chip_start(struct net_device *ndev)
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XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
|
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XCAN_IXR_ARBLST_MASK | xcan_rx_int_mask(priv);
|
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|
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if (priv->ecc_enable)
|
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ier |= XCAN_IXR_ECC_MASK;
|
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|
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if (priv->devtype.flags & XCAN_FLAG_RXMNF)
|
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ier |= XCAN_IXR_RXMNF_MASK;
|
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|
||||
|
@ -1127,6 +1189,54 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
|
|||
priv->can.can_stats.bus_error++;
|
||||
}
|
||||
|
||||
if (priv->ecc_enable && isr & XCAN_IXR_ECC_MASK) {
|
||||
u32 reg_rx_ecc, reg_txol_ecc, reg_txtl_ecc;
|
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|
||||
reg_rx_ecc = priv->read_reg(priv, XCAN_RXFIFO_ECC_OFFSET);
|
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reg_txol_ecc = priv->read_reg(priv, XCAN_TXOLFIFO_ECC_OFFSET);
|
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reg_txtl_ecc = priv->read_reg(priv, XCAN_TXTLFIFO_ECC_OFFSET);
|
||||
|
||||
/* The counter reaches its maximum at 0xffff and does not overflow.
|
||||
* Accept the small race window between reading and resetting ECC counters.
|
||||
*/
|
||||
priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK |
|
||||
XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK);
|
||||
|
||||
u64_stats_update_begin(&priv->syncp);
|
||||
|
||||
if (isr & XCAN_IXR_E2BERX_MASK) {
|
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u64_stats_add(&priv->ecc_rx_2_bit_errors,
|
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FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_rx_ecc));
|
||||
}
|
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|
||||
if (isr & XCAN_IXR_E1BERX_MASK) {
|
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u64_stats_add(&priv->ecc_rx_1_bit_errors,
|
||||
FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_rx_ecc));
|
||||
}
|
||||
|
||||
if (isr & XCAN_IXR_E2BETXOL_MASK) {
|
||||
u64_stats_add(&priv->ecc_txol_2_bit_errors,
|
||||
FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_txol_ecc));
|
||||
}
|
||||
|
||||
if (isr & XCAN_IXR_E1BETXOL_MASK) {
|
||||
u64_stats_add(&priv->ecc_txol_1_bit_errors,
|
||||
FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_txol_ecc));
|
||||
}
|
||||
|
||||
if (isr & XCAN_IXR_E2BETXTL_MASK) {
|
||||
u64_stats_add(&priv->ecc_txtl_2_bit_errors,
|
||||
FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_txtl_ecc));
|
||||
}
|
||||
|
||||
if (isr & XCAN_IXR_E1BETXTL_MASK) {
|
||||
u64_stats_add(&priv->ecc_txtl_1_bit_errors,
|
||||
FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_txtl_ecc));
|
||||
}
|
||||
|
||||
u64_stats_update_end(&priv->syncp);
|
||||
}
|
||||
|
||||
if (cf.can_id) {
|
||||
struct can_frame *skb_cf;
|
||||
struct sk_buff *skb = alloc_can_err_skb(ndev, &skb_cf);
|
||||
|
@ -1354,8 +1464,8 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
|
|||
{
|
||||
struct net_device *ndev = (struct net_device *)dev_id;
|
||||
struct xcan_priv *priv = netdev_priv(ndev);
|
||||
u32 isr_errors, mask;
|
||||
u32 isr, ier;
|
||||
u32 isr_errors;
|
||||
u32 rx_int_mask = xcan_rx_int_mask(priv);
|
||||
|
||||
/* Get the interrupt status from Xilinx CAN */
|
||||
|
@ -1374,10 +1484,15 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
|
|||
if (isr & XCAN_IXR_TXOK_MASK)
|
||||
xcan_tx_interrupt(ndev, isr);
|
||||
|
||||
mask = XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
|
||||
XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK |
|
||||
XCAN_IXR_RXMNF_MASK;
|
||||
|
||||
if (priv->ecc_enable)
|
||||
mask |= XCAN_IXR_ECC_MASK;
|
||||
|
||||
/* Check for the type of error interrupt and Processing it */
|
||||
isr_errors = isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
|
||||
XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK |
|
||||
XCAN_IXR_RXMNF_MASK);
|
||||
isr_errors = isr & mask;
|
||||
if (isr_errors) {
|
||||
priv->write_reg(priv, XCAN_ICR_OFFSET, isr_errors);
|
||||
xcan_err_interrupt(ndev, isr);
|
||||
|
@ -1546,6 +1661,43 @@ static int xcan_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void xcan_get_strings(struct net_device *ndev, u32 stringset, u8 *buf)
|
||||
{
|
||||
switch (stringset) {
|
||||
case ETH_SS_STATS:
|
||||
memcpy(buf, &xcan_priv_flags_strings,
|
||||
sizeof(xcan_priv_flags_strings));
|
||||
}
|
||||
}
|
||||
|
||||
static int xcan_get_sset_count(struct net_device *netdev, int sset)
|
||||
{
|
||||
switch (sset) {
|
||||
case ETH_SS_STATS:
|
||||
return ARRAY_SIZE(xcan_priv_flags_strings);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static void xcan_get_ethtool_stats(struct net_device *ndev,
|
||||
struct ethtool_stats *stats, u64 *data)
|
||||
{
|
||||
struct xcan_priv *priv = netdev_priv(ndev);
|
||||
unsigned int start;
|
||||
|
||||
do {
|
||||
start = u64_stats_fetch_begin(&priv->syncp);
|
||||
|
||||
data[XCAN_ECC_RX_2_BIT_ERRORS] = u64_stats_read(&priv->ecc_rx_2_bit_errors);
|
||||
data[XCAN_ECC_RX_1_BIT_ERRORS] = u64_stats_read(&priv->ecc_rx_1_bit_errors);
|
||||
data[XCAN_ECC_TXOL_2_BIT_ERRORS] = u64_stats_read(&priv->ecc_txol_2_bit_errors);
|
||||
data[XCAN_ECC_TXOL_1_BIT_ERRORS] = u64_stats_read(&priv->ecc_txol_1_bit_errors);
|
||||
data[XCAN_ECC_TXTL_2_BIT_ERRORS] = u64_stats_read(&priv->ecc_txtl_2_bit_errors);
|
||||
data[XCAN_ECC_TXTL_1_BIT_ERRORS] = u64_stats_read(&priv->ecc_txtl_1_bit_errors);
|
||||
} while (u64_stats_fetch_retry(&priv->syncp, start));
|
||||
}
|
||||
|
||||
static const struct net_device_ops xcan_netdev_ops = {
|
||||
.ndo_open = xcan_open,
|
||||
.ndo_stop = xcan_close,
|
||||
|
@ -1555,6 +1707,9 @@ static const struct net_device_ops xcan_netdev_ops = {
|
|||
|
||||
static const struct ethtool_ops xcan_ethtool_ops = {
|
||||
.get_ts_info = ethtool_op_get_ts_info,
|
||||
.get_strings = xcan_get_strings,
|
||||
.get_sset_count = xcan_get_sset_count,
|
||||
.get_ethtool_stats = xcan_get_ethtool_stats,
|
||||
};
|
||||
|
||||
/**
|
||||
|
@ -1793,6 +1948,7 @@ static int xcan_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
|
||||
priv = netdev_priv(ndev);
|
||||
priv->ecc_enable = of_property_read_bool(pdev->dev.of_node, "xlnx,has-ecc");
|
||||
priv->dev = &pdev->dev;
|
||||
priv->can.bittiming_const = devtype->bittiming_const;
|
||||
priv->can.do_set_mode = xcan_do_set_mode;
|
||||
|
@ -1909,6 +2065,11 @@ static int xcan_probe(struct platform_device *pdev)
|
|||
priv->reg_base, ndev->irq, priv->can.clock.freq,
|
||||
hw_tx_max, priv->tx_max);
|
||||
|
||||
if (priv->ecc_enable) {
|
||||
/* Reset FIFO ECC counters */
|
||||
priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK |
|
||||
XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK);
|
||||
}
|
||||
return 0;
|
||||
|
||||
err_disableclks:
|
||||
|
|
|
@ -756,7 +756,6 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
|
|||
struct raw_sock *ro = raw_sk(sk);
|
||||
int len;
|
||||
void *val;
|
||||
int err = 0;
|
||||
|
||||
if (level != SOL_CAN_RAW)
|
||||
return -EINVAL;
|
||||
|
@ -766,7 +765,9 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
|
|||
return -EINVAL;
|
||||
|
||||
switch (optname) {
|
||||
case CAN_RAW_FILTER:
|
||||
case CAN_RAW_FILTER: {
|
||||
int err = 0;
|
||||
|
||||
lock_sock(sk);
|
||||
if (ro->count > 0) {
|
||||
int fsize = ro->count * sizeof(struct can_filter);
|
||||
|
@ -791,7 +792,7 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
|
|||
if (!err)
|
||||
err = put_user(len, optlen);
|
||||
return err;
|
||||
|
||||
}
|
||||
case CAN_RAW_ERR_FILTER:
|
||||
if (len > sizeof(can_err_mask_t))
|
||||
len = sizeof(can_err_mask_t);
|
||||
|
@ -822,7 +823,9 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
|
|||
val = &ro->xl_frames;
|
||||
break;
|
||||
|
||||
case CAN_RAW_XL_VCID_OPTS:
|
||||
case CAN_RAW_XL_VCID_OPTS: {
|
||||
int err = 0;
|
||||
|
||||
/* user space buffer to small for VCID opts? */
|
||||
if (len < sizeof(ro->raw_vcid_opts)) {
|
||||
/* return -ERANGE and needed space in optlen */
|
||||
|
@ -835,8 +838,10 @@ static int raw_getsockopt(struct socket *sock, int level, int optname,
|
|||
if (copy_to_user(optval, &ro->raw_vcid_opts, len))
|
||||
err = -EFAULT;
|
||||
}
|
||||
break;
|
||||
|
||||
if (!err)
|
||||
err = put_user(len, optlen);
|
||||
return err;
|
||||
}
|
||||
case CAN_RAW_JOIN_FILTERS:
|
||||
if (len > sizeof(int))
|
||||
len = sizeof(int);
|
||||
|
|
Loading…
Reference in New Issue