dt-bindings: clock: rockchip: add USB480M_PHY mux
The USB480M clock can source from a MUX that selects the clock to come from either of the USB-phy internal 480MHz PLLs. These clocks are provided by the USB phy driver. This adds the define for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-1-6c89de20a6ff@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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#define CPLL_333M 9
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#define ARMCLK 10
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#define USB480M 11
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#define USB480M_PHY 12
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#define ACLK_CORE_NIU2BUS 18
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#define CLK_CORE_PVTM 19
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#define CLK_CORE_PVTM_CORE 20
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