dmaengine: sf-pdma: add mpfs-pdma compatible name
Sifive platform dma (sf-pdma) has both in-order and out-of-order configurations but sf-pdam driver configured to do in-order DMA transfers, with out-of-order configuration got better throughput in the PolarFire SoC platform. Add a PolarFire SoC specific compatible and code to support for out-of-order dma transfers Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Link: https://lore.kernel.org/r/20231208103856.3732998-4-shravan.chippa@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -25,6 +25,8 @@
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#include "sf-pdma.h"
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#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
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#ifndef readq
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static inline unsigned long long readq(void __iomem *addr)
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{
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@ -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
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static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
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u64 dst, u64 src, u64 size)
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{
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desc->xfer_type = PDMA_FULL_SPEED;
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desc->xfer_type = desc->chan->pdma->transfer_type;
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desc->xfer_size = size;
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desc->dst_addr = dst;
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desc->src_addr = src;
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@ -493,6 +495,7 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
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static int sf_pdma_probe(struct platform_device *pdev)
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{
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const struct sf_pdma_driver_platdata *ddata;
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struct sf_pdma *pdma;
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int ret, n_chans;
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const enum dma_slave_buswidth widths =
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@ -518,6 +521,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
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pdma->n_chans = n_chans;
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pdma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
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ddata = device_get_match_data(&pdev->dev);
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if (ddata) {
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if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
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pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
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}
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pdma->membase = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(pdma->membase))
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return PTR_ERR(pdma->membase);
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@ -603,9 +614,19 @@ static void sf_pdma_remove(struct platform_device *pdev)
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dma_async_device_unregister(&pdma->dma_dev);
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}
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static const struct sf_pdma_driver_platdata mpfs_pdma = {
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.quirks = PDMA_QUIRK_NO_STRICT_ORDERING,
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};
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static const struct of_device_id sf_pdma_dt_ids[] = {
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{ .compatible = "sifive,fu540-c000-pdma" },
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{ .compatible = "sifive,pdma0" },
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{
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.compatible = "sifive,fu540-c000-pdma",
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}, {
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.compatible = "sifive,pdma0",
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}, {
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.compatible = "microchip,mpfs-pdma",
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.data = &mpfs_pdma,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
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@ -48,7 +48,8 @@
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#define PDMA_ERR_STATUS_MASK GENMASK(31, 31)
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/* Transfer Type */
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#define PDMA_FULL_SPEED 0xFF000008
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#define PDMA_FULL_SPEED 0xFF000000
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#define PDMA_STRICT_ORDERING BIT(3)
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/* Error Recovery */
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#define MAX_RETRY 1
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@ -112,8 +113,13 @@ struct sf_pdma {
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struct dma_device dma_dev;
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void __iomem *membase;
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void __iomem *mappedbase;
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u32 transfer_type;
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u32 n_chans;
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struct sf_pdma_chan chans[] __counted_by(n_chans);
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};
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struct sf_pdma_driver_platdata {
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u32 quirks;
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};
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#endif /* _SF_PDMA_H */
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