pinctrl: sunxi: d1: Add CAN bus pinmuxes
The D1 pin controller contains muxes for two CAN buses. While the CAN bus controllers are only documented for the T113 SoC, the pin controller is the same across all SoC variants. Signed-off-by: Fabien Poussin <fabien.poussin@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20221126191636.6673-1-samuel@sholland.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -47,6 +47,7 @@ static const struct sunxi_desc_pin d1_pins[] = {
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SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN2 */
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SUNXI_FUNCTION(0x6, "lcd0"), /* D18 */
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SUNXI_FUNCTION(0x7, "uart4"), /* TX */
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SUNXI_FUNCTION(0x8, "can0"), /* TX */
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SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 2)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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@ -57,6 +58,7 @@ static const struct sunxi_desc_pin d1_pins[] = {
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SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN0 */
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SUNXI_FUNCTION(0x6, "lcd0"), /* D19 */
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SUNXI_FUNCTION(0x7, "uart4"), /* RX */
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SUNXI_FUNCTION(0x8, "can0"), /* RX */
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SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 3)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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@ -67,6 +69,7 @@ static const struct sunxi_desc_pin d1_pins[] = {
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SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN1 */
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SUNXI_FUNCTION(0x6, "lcd0"), /* D20 */
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SUNXI_FUNCTION(0x7, "uart5"), /* TX */
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SUNXI_FUNCTION(0x8, "can1"), /* TX */
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SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 4)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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@ -77,6 +80,7 @@ static const struct sunxi_desc_pin d1_pins[] = {
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SUNXI_FUNCTION(0x5, "pwm0"),
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SUNXI_FUNCTION(0x6, "lcd0"), /* D21 */
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SUNXI_FUNCTION(0x7, "uart5"), /* RX */
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SUNXI_FUNCTION(0x8, "can1"), /* RX */
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SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 5)),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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