[MIPS] 24K LV: Add core card id.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2a2c3e4519
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7a8341969f
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@ -337,6 +337,7 @@ void __init prom_init(void)
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case MIPS_REVISION_CORID_CORE_MSC:
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case MIPS_REVISION_CORID_CORE_FPGA2:
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_24K:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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_pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
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@ -198,6 +198,7 @@ void __init mips_pcibios_init(void)
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case MIPS_REVISION_CORID_CORE_MSC:
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case MIPS_REVISION_CORID_CORE_FPGA2:
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_24K:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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/* Set up resource ranges from the controller's registers. */
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MSC_READ(MSC01_PCI_SC2PMBASL, start);
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@ -57,6 +57,7 @@ static inline int mips_pcibios_iack(void)
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case MIPS_REVISION_CORID_CORE_MSC:
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case MIPS_REVISION_CORID_CORE_FPGA2:
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_24K:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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MSC_READ(MSC01_PCI_IACK, irq);
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irq &= 0xff;
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@ -143,6 +144,7 @@ void corehi_irqdispatch(struct pt_regs *regs)
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case MIPS_REVISION_CORID_CORE_MSC:
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case MIPS_REVISION_CORID_CORE_FPGA2:
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_24K:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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ll_msc_irq(regs);
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break;
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@ -309,6 +311,7 @@ void __init arch_init_irq(void)
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case MIPS_REVISION_CORID_CORE_MSC:
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case MIPS_REVISION_CORID_CORE_FPGA2:
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_24K:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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if (cpu_has_veic)
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init_msc_irqs (MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
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@ -67,6 +67,7 @@
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#define MIPS_REVISION_CORID_CORE_FPGA2 7
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#define MIPS_REVISION_CORID_CORE_FPGAR2 8
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#define MIPS_REVISION_CORID_CORE_FPGA3 9
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#define MIPS_REVISION_CORID_CORE_24K 10
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/**** Artificial corid defines ****/
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/*
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