x86_64: prepare apic code for clock events
Change __setup_APIC_LVTT so it takes the arguments which are necessary for the later clock events switch. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
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@ -759,14 +759,14 @@ void __init init_apic_mappings(void)
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#define APIC_DIVISOR 16
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static void __setup_APIC_LVTT(unsigned int clocks)
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static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
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{
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unsigned int lvtt_value, tmp_value;
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int cpu = smp_processor_id();
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lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;
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if (cpu_isset(cpu, timer_interrupt_broadcast_ipi_mask))
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lvtt_value = LOCAL_TIMER_VECTOR;
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if (!oneshot)
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lvtt_value |= APIC_LVT_TIMER_PERIODIC;
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if (!irqen)
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lvtt_value |= APIC_LVT_MASKED;
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apic_write(APIC_LVTT, lvtt_value);
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@ -779,12 +779,14 @@ static void __setup_APIC_LVTT(unsigned int clocks)
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& ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE))
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| APIC_TDR_DIV_16);
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apic_write(APIC_TMICT, clocks/APIC_DIVISOR);
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if (!oneshot)
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apic_write(APIC_TMICT, clocks/APIC_DIVISOR);
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}
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static void setup_APIC_timer(unsigned int clocks)
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{
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unsigned long flags;
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int irqen;
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local_irq_save(flags);
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@ -805,7 +807,10 @@ static void setup_APIC_timer(unsigned int clocks)
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c2 |= inb_p(0x40) << 8;
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} while (c2 - c1 < 300);
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}
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__setup_APIC_LVTT(clocks);
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irqen = ! cpu_isset(smp_processor_id(),
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timer_interrupt_broadcast_ipi_mask);
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__setup_APIC_LVTT(clocks, 0, irqen);
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/* Turn off PIT interrupt if we use APIC timer as main timer.
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Only works with the PM timer right now
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TBD fix it for HPET too. */
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@ -843,8 +848,10 @@ static int __init calibrate_APIC_clock(void)
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* Put whatever arbitrary (but long enough) timeout
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* value into the APIC clock, we just want to get the
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* counter running for calibration.
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*
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* No interrupt enable !
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*/
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__setup_APIC_LVTT(4000000000);
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__setup_APIC_LVTT(4000000000, 0, 0);
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apic_start = apic_read(APIC_TMCCT);
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#ifdef CONFIG_X86_PM_TIMER
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